diff options
| author | Matt Wagner <mwagner@nvidia.com> | 2011-09-01 15:09:40 -0700 |
|---|---|---|
| committer | Ryan Wong <ryanw@nvidia.com> | 2011-09-07 11:24:11 -0700 |
| commit | e66968c944f2b99eba5a8ea40306c81bc148923e (patch) | |
| tree | 72b110b4b3f6c62c0a062da1191694528a75a43f /drivers/video/tegra/dc/dc_reg.h | |
| parent | e1fa6f8826cdd1674745b54dcad8042f5d5acce5 (diff) | |
video: tegra: Phase in DIDIMtegra-12r8-earlytegra-12r8-android-3.2tegra-12r8-android-2.3
Settings in DIDIM driver are now phased in over a defined
number of steps in order to minimize the perception of changes
to the settings during runtime
Bug 840155
Change-Id: Id1a354dc153a432cdd08d54f197adb6b37d2fdb0
Reviewed-on: http://git-master/r/50926
Tested-by: Matt Wagner <mwagner@nvidia.com>
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
Diffstat (limited to 'drivers/video/tegra/dc/dc_reg.h')
| -rw-r--r-- | drivers/video/tegra/dc/dc_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/video/tegra/dc/dc_reg.h b/drivers/video/tegra/dc/dc_reg.h index d5fb4fd7c547..0d3436ea4f05 100644 --- a/drivers/video/tegra/dc/dc_reg.h +++ b/drivers/video/tegra/dc/dc_reg.h @@ -487,6 +487,9 @@ #define SD_CORRECTION_MODE_MAN (1 << 11) #define NUM_BIN_WIDTHS 4 +#define STEPS_PER_AGG_LVL 32 +#define STEPS_PER_AGG_CHG_LOG2 4 +#define STEPS_PER_AGG_CHG (1<<STEPS_PER_AGG_CHG_LOG2) #define DC_DISP_SD_CSC_COEFF 0x4c3 #define SD_CSC_COEFF_R(x) (((x) & 0xf) << 4) |