video: tegra: host: CPU reg read to use power management

CPU register read did not have access to nvhost power management.
Due to this only modules that were powered on previously are actually
accessible via the API. This patch refactors CPU access to:

 * Move mutexes to sync point, as they're sync point operations
 * Move register address spaces to nvhost_device
 * Call register read with access to the respective nvhost_device
 * Initialize module completely at boot-up so that register reads
   can be done without an initialized channel.

Reviewed-on: http://git-master/r/75275

Change-Id: I0db38cef7b2cd92dc64e7f55d227bdd2fdb8f752
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77764
Reviewed-by: Automatic_Commit_Validation_User

1 files changed, 53 insertions, 0 deletions

diff --git a/drivers/video/tegra/host/bus_client.c b/drivers/video/tegra/host/bus_client.c
new file mode 100644
index 000000000000..3d455298af8e
--- /dev/null
+++ b/drivers/video/tegra/host/bus_client.c
@@ -0,0 +1,53 @@
+/*
+ * drivers/video/tegra/host/bus_client.c
+ *
+ * Tegra Graphics Host Client Module
+ *
+ * Copyright (c) 2010-2012, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#include "bus_client.h"
+#include "dev.h"
+#include <linux/string.h>
+
+void nvhost_read_module_regs(struct nvhost_device *ndev,
+			u32 offset, int count, u32 *values)
+{
+	void __iomem *p = ndev->aperture + offset;
+
+	nvhost_module_busy(ndev);
+	while (count--) {
+		*(values++) = readl(p);
+		p += 4;
+	}
+	rmb();
+	nvhost_module_idle(ndev);
+}
+
+void nvhost_write_module_regs(struct nvhost_device *ndev,
+			u32 offset, int count, const u32 *values)
+{
+	void __iomem *p = ndev->aperture + offset;
+
+	nvhost_module_busy(ndev);
+	while (count--) {
+		writel(*(values++), p);
+		p += 4;
+	}
+	wmb();
+	nvhost_module_idle(ndev);
+}