diff options
| author | Kevin Huang <kevinh@nvidia.com> | 2013-06-15 14:07:24 -0700 |
|---|---|---|
| committer | Gabby Lee <galee@nvidia.com> | 2013-06-19 00:54:31 -0700 |
| commit | eac6744e9a85a7029b7a0571ea3d811f11def1b6 (patch) | |
| tree | 0c7973632b7173d11dc98e45a648f157953c70d9 /drivers/video | |
| parent | 0214c023bd6df868e8510487f964e57562c1d114 (diff) | |
video: tegra: dc: apply clock WAR to t11x.
Bug 1271058
Bug 1275386
Bug 1291285
Change-Id: I1d6918c580e5787978451566f8a365737e1f6adc
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/239408
(cherry picked from commit 394a03a03295ee568c6623f3f55cfd589ef9b5d4)
Reviewed-on: http://git-master/r/239974
Reviewed-by: Youngjin Kim <nkim@nvidia.com>
Tested-by: Youngjin Kim <nkim@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Gabby Lee <galee@nvidia.com>
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/tegra/dc/dsi.c | 2 | ||||
| -rw-r--r-- | drivers/video/tegra/dc/mode.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c index 17523ed28119..225fe8248754 100644 --- a/drivers/video/tegra/dc/dsi.c +++ b/drivers/video/tegra/dc/dsi.c @@ -1792,7 +1792,7 @@ static void tegra_dsi_set_dc_clk(struct tegra_dc *dc, /* SW WAR for bug 1045373. To make the shift clk dividor effect under * all circumstances, write N+2 to SHIFT_CLK_DIVIDER and activate it. * After 2us delay, write the target values to it. */ -#if defined(CONFIG_ARCH_TEGRA_14x_SOC) +#if defined(CONFIG_ARCH_TEGRA_11x_SOC) || defined(CONFIG_ARCH_TEGRA_14x_SOC) tegra_dc_writel(dc, val, DC_DISP_DISP_CLOCK_CONTROL); tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL); tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); diff --git a/drivers/video/tegra/dc/mode.c b/drivers/video/tegra/dc/mode.c index a96e3d915889..86ad7ada04e9 100644 --- a/drivers/video/tegra/dc/mode.c +++ b/drivers/video/tegra/dc/mode.c @@ -256,7 +256,7 @@ int tegra_dc_program_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode) /* SW WAR for bug 1045373. To make the shift clk dividor effect under * all circumstances, write N+2 to SHIFT_CLK_DIVIDER and activate it. * After 2us delay, write the target values to it. */ -#if defined(CONFIG_ARCH_TEGRA_14x_SOC) +#if defined(CONFIG_ARCH_TEGRA_11x_SOC) || defined(CONFIG_ARCH_TEGRA_14x_SOC) tegra_dc_writel(dc, PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(div + 2), DC_DISP_DISP_CLOCK_CONTROL); tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL); |