diff options
| author | Karl Kim <kkim@nvidia.com> | 2013-07-05 10:01:38 +0900 |
|---|---|---|
| committer | Peter Kim <pekim@nvidia.com> | 2013-07-04 19:28:32 -0700 |
| commit | b21e80c5ffd33b406db1c28433efc9e49b524c95 (patch) | |
| tree | cf6ca8ed698528781db0a8c2606e4b5251b7771b /drivers/video | |
| parent | 73f4d078ec2829cc1030f60b24b5bdc6affd6952 (diff) | |
Revert "video: tegra: camera: set latency allowance value"
This reverts commit 8e8f5f462010a0ea98611d6fbc8a613f15bab78e.
Change-Id: Ibeee9c3af4248cb0298ddbcb2ce0d08a4b080121
Signed-off-by: Karl Kim <kkim@nvidia.com>
Reviewed-on: http://git-master/r/245217
Reviewed-by: Peter Kim <pekim@nvidia.com>
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/tegra/camera/camera_clk.c | 34 | ||||
| -rw-r--r-- | drivers/video/tegra/camera/camera_clk.h | 5 |
2 files changed, 3 insertions, 36 deletions
diff --git a/drivers/video/tegra/camera/camera_clk.c b/drivers/video/tegra/camera/camera_clk.c index 93462fce86d5..e83ac4e68a2b 100644 --- a/drivers/video/tegra/camera/camera_clk.c +++ b/drivers/video/tegra/camera/camera_clk.c @@ -14,14 +14,8 @@ * */ -#include <mach/latency_allowance.h> #include "camera_clk.h" -#define BPP_YUV422 16UL -#define BPP_YUV420_Y 8UL -#define BPP_YUV420_U 2UL -#define BPP_YUV420_V 2UL - int tegra_camera_enable_clk(struct tegra_camera *camera) { int i; @@ -43,7 +37,7 @@ int tegra_camera_disable_clk(struct tegra_camera *camera) } int tegra_camera_init_clk(struct tegra_camera *camera, - struct clock_data *clock_init) + struct clock_data *clock_init) { int i; for (i = 0; i < CAMERA_CLK_MAX; i++) { @@ -219,7 +213,6 @@ int tegra_camera_clk_set_rate(struct tegra_camera *camera) tegra_clk_cfg_ex(camera->clock[CAMERA_PLL_D2_CLK].clk, TEGRA_CLK_PLLD_DSI_OUT_ENB, 0); } - tegra_camera_set_latency_allowance(camera, parent_div_rate_pre); #endif } @@ -251,28 +244,3 @@ unsigned int tegra_camera_get_max_bw(struct tegra_camera *camera) return (unsigned int)max_bw; } - -int tegra_camera_set_latency_allowance(struct tegra_camera *camera, - unsigned long vi_freq) -{ - /* - * Assumption is that preview port has YUV422 and video port has - * YUV420. Preview port may have Bayer format which has 10 bit per - * pixel. Even if preview port has Bayer format, setting latency - * allowance with YUV422 format should be OK because BPP of YUV422 is - * higher than BPP of Bayer. - * When this function gets called, video format is not programmed yet. - * That's why we have to assume video format here rather than reading - * them from registers. - */ - tegra_set_latency_allowance(TEGRA_LA_VI_WSB, - ((vi_freq / 1000000UL) * BPP_YUV422) / 8UL); - tegra_set_latency_allowance(TEGRA_LA_VI_WU, - ((vi_freq / 1000000UL) * BPP_YUV420_U) / 8UL); - tegra_set_latency_allowance(TEGRA_LA_VI_WV, - ((vi_freq / 1000000UL) * BPP_YUV420_V) / 8UL); - tegra_set_latency_allowance(TEGRA_LA_VI_WY, - ((vi_freq / 1000000UL) * BPP_YUV420_Y) / 8UL); - - return 0; -} diff --git a/drivers/video/tegra/camera/camera_clk.h b/drivers/video/tegra/camera/camera_clk.h index 257d22fe5aad..dcd7cdd68165 100644 --- a/drivers/video/tegra/camera/camera_clk.h +++ b/drivers/video/tegra/camera/camera_clk.h @@ -22,8 +22,7 @@ int tegra_camera_enable_clk(struct tegra_camera *camera); int tegra_camera_disable_clk(struct tegra_camera *camera); int tegra_camera_clk_set_rate(struct tegra_camera *camera); int tegra_camera_init_clk(struct tegra_camera *camera, - struct clock_data *clock_init); + struct clock_data *clock_init); unsigned int tegra_camera_get_max_bw(struct tegra_camera *camera); -int tegra_camera_set_latency_allowance(struct tegra_camera *camera, - unsigned long vi_freq); + #endif |