diff options
| author | Hyungwoo Yang <hyungwooy@nvidia.com> | 2011-09-06 19:03:10 -0700 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-09-08 17:19:47 -0700 |
| commit | b83e795747fa860b5b7fb66b2067ebe4f15bcfd0 (patch) | |
| tree | 49d2cf606b7927475f5f2c61945e514a95eac372 /drivers | |
| parent | 642eac7b9c8994b42d32a0c3794d0bb2194e62c0 (diff) | |
video: tegra: support display board PM313
This change supports PM313 with 19X12 panel.
The change uses PM313 in "Single input to Dual output" mode
Bug ID : 822980
Change-Id: Ibba1f116ea6e4b2626e451c66a39caca79055d0e
Reviewed-on: http://git-master/r/50215
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/video/tegra/dc/dc.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c index 94580d90aff1..59bae4329668 100644 --- a/drivers/video/tegra/dc/dc.c +++ b/drivers/video/tegra/dc/dc.c @@ -1218,17 +1218,28 @@ void tegra_dc_setup_clk(struct tegra_dc *dc, struct clk *clk) int pclk; if (dc->out->type == TEGRA_DC_OUT_RGB) { + unsigned long rate; struct clk *parent_clk = clk_get_sys(NULL, dc->out->parent_clk ? : "pll_p"); if (clk_get_parent(clk) != parent_clk) clk_set_parent(clk, parent_clk); + + if (parent_clk != clk_get_sys(NULL, "pll_p")) { + struct clk *base_clk = clk_get_parent(parent_clk); + + /* Assuming either pll_d or pll_d2 is used */ + rate = dc->mode.pclk * 2; + + if (rate != clk_get_rate(base_clk)) + clk_set_rate(base_clk, rate); + } } if (dc->out->type == TEGRA_DC_OUT_HDMI) { unsigned long rate; struct clk *parent_clk = - clk_get_sys(NULL, dc->out->parent_clk ? : "pll_d_out0"); + clk_get_sys(NULL, dc->out->parent_clk ? : "pll_d2_out0"); struct clk *base_clk = clk_get_parent(parent_clk); /* needs to match tegra_dc_hdmi_supported_modes[] |