diff options
| author | Ken Chang <kenc@nvidia.com> | 2012-02-13 11:22:21 +0800 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-02-23 17:38:15 -0800 |
| commit | 85f79b22473241c463a6b6563239d5916f627410 (patch) | |
| tree | cc755f7c4c1f688e765acc218e9860b6a1bc3753 /drivers | |
| parent | 89042df80700b4cb44a2da4c213d92cd080f559c (diff) | |
video: tegra: dc: fix pixel clock latency issue
GENERAL_ACT_REQ causes double-buffered registers to become active.
This register needs to be programed to reduce the latency of pixel clock after
dc enabled by tegra_dc_enable().
bug 926189
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/83346
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit f39c5ddd1867c508900c9aa2d4eead7eb3082343)
Change-Id: I741c9be9074709c1ab571aa631cb462599d5fb78
Reviewed-on: http://git-master/r/84561
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/video/tegra/dc/dc.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c index 2ee5860f0f91..ab77b7e11dac 100644 --- a/drivers/video/tegra/dc/dc.c +++ b/drivers/video/tegra/dc/dc.c @@ -1706,6 +1706,9 @@ static int tegra_dc_program_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode (mode->h_active << 16) | mode->v_active); #endif + tegra_dc_writel(dc, GENERAL_UPDATE, DC_CMD_STATE_CONTROL); + tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); + return 0; } |