diff options
author | Chao Jiang <chaoj@nvidia.com> | 2010-11-30 20:50:33 +0900 |
---|---|---|
committer | Bharat Nihalani <bnihalani@nvidia.com> | 2010-12-14 01:43:30 -0800 |
commit | 144065eea12d4750b83de547fabbe25ad8bc7dfb (patch) | |
tree | b3b9ef8ecc3c0641706dfa5d000df007bcba60bd /drivers | |
parent | ac24fe4ee9aab5b3f03fb799b549ff3daa0a7b73 (diff) |
video: tegra: support output pin polarities setting
Add support for set up pin polarities in DC driver.
fixes bug 758356
Change-Id: Iff7026929d73e9cf232baeda1f9f0c8bbd60b66b
Reviewed-on: http://git-master/r/11674
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/video/tegra/dc/dc.c | 74 | ||||
-rw-r--r-- | drivers/video/tegra/dc/dc_reg.h | 8 |
2 files changed, 82 insertions, 0 deletions
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c index 3c3a4754b7dc..cfe962be62f3 100644 --- a/drivers/video/tegra/dc/dc.c +++ b/drivers/video/tegra/dc/dc.c @@ -780,6 +780,76 @@ int tegra_dc_set_mode(struct tegra_dc *dc, const struct tegra_dc_mode *mode) } EXPORT_SYMBOL(tegra_dc_set_mode); +static void tegra_dc_set_out_pin_polars(struct tegra_dc *dc, + const struct tegra_dc_out_pin *pins, + const unsigned int n_pins) +{ + unsigned int i; + + int name; + int pol; + + u32 pol1, pol3; + + u32 set1, unset1; + u32 set3, unset3; + + set1 = set3 = unset1 = unset3 = 0; + + for (i = 0; i < n_pins; i++) { + name = (pins + i)->name; + pol = (pins + i)->pol; + + /* set polarity by name */ + switch (name) { + case TEGRA_DC_OUT_PIN_DATA_ENABLE: + if (pol == TEGRA_DC_OUT_PIN_POL_LOW) + set3 |= LSPI_OUTPUT_POLARITY_LOW; + else + unset3 |= LSPI_OUTPUT_POLARITY_LOW; + break; + case TEGRA_DC_OUT_PIN_H_SYNC: + if (pol == TEGRA_DC_OUT_PIN_POL_LOW) + set1 |= LHS_OUTPUT_POLARITY_LOW; + else + unset1 |= LHS_OUTPUT_POLARITY_LOW; + break; + case TEGRA_DC_OUT_PIN_V_SYNC: + if (pol == TEGRA_DC_OUT_PIN_POL_LOW) + set1 |= LVS_OUTPUT_POLARITY_LOW; + else + unset1 |= LVS_OUTPUT_POLARITY_LOW; + break; + case TEGRA_DC_OUT_PIN_PIXEL_CLOCK: + if (pol == TEGRA_DC_OUT_PIN_POL_LOW) + set1 |= LSC0_OUTPUT_POLARITY_LOW; + else + unset1 |= LSC0_OUTPUT_POLARITY_LOW; + break; + default: + printk("Invalid argument in function %s\n", + __FUNCTION__); + break; + } + } + + mutex_lock(&dc->lock); + + pol1 = tegra_dc_readl(dc, DC_COM_PIN_OUTPUT_POLARITY1); + pol3 = tegra_dc_readl(dc, DC_COM_PIN_OUTPUT_POLARITY3); + + pol1 |= set1; + pol1 &= ~unset1; + + pol3 |= set3; + pol3 &= ~unset3; + + tegra_dc_writel(dc, pol1, DC_COM_PIN_OUTPUT_POLARITY1); + tegra_dc_writel(dc, pol3, DC_COM_PIN_OUTPUT_POLARITY3); + + mutex_unlock(&dc->lock); +} + static void tegra_dc_set_out(struct tegra_dc *dc, struct tegra_dc_out *out) { dc->out = out; @@ -975,6 +1045,10 @@ static bool _tegra_dc_enable(struct tegra_dc *dc) if (dc->out_ops && dc->out_ops->enable) dc->out_ops->enable(dc); + if (dc->out->out_pins) + tegra_dc_set_out_pin_polars(dc, dc->out->out_pins, + dc->out->n_out_pins); + /* force a full blending update */ dc->blend.z[0] = -1; diff --git a/drivers/video/tegra/dc/dc_reg.h b/drivers/video/tegra/dc/dc_reg.h index f643ec9ec742..1911b0ed5ca6 100644 --- a/drivers/video/tegra/dc/dc_reg.h +++ b/drivers/video/tegra/dc/dc_reg.h @@ -108,9 +108,17 @@ #define DC_COM_PIN_OUTPUT_ENABLE2 0x304 #define DC_COM_PIN_OUTPUT_ENABLE3 0x305 #define DC_COM_PIN_OUTPUT_POLARITY0 0x306 + #define DC_COM_PIN_OUTPUT_POLARITY1 0x307 +#define LHS_OUTPUT_POLARITY_LOW (1 << 30) +#define LVS_OUTPUT_POLARITY_LOW (1 << 28) +#define LSC0_OUTPUT_POLARITY_LOW (1 << 24) + #define DC_COM_PIN_OUTPUT_POLARITY2 0x308 + #define DC_COM_PIN_OUTPUT_POLARITY3 0x309 +#define LSPI_OUTPUT_POLARITY_LOW (1 << 8) + #define DC_COM_PIN_OUTPUT_DATA0 0x30a #define DC_COM_PIN_OUTPUT_DATA1 0x30b #define DC_COM_PIN_OUTPUT_DATA2 0x30c |