diff options
author | Erik Gilling <konkers@android.com> | 2011-02-02 18:41:30 -0800 |
---|---|---|
committer | Erik Gilling <konkers@android.com> | 2011-02-02 18:41:46 -0800 |
commit | e445bfcaf1ee8d0a43c6a4fd9e88073fd234ea89 (patch) | |
tree | 52f43be9d7e71095359923b26fa8b0f830422bb1 /drivers | |
parent | c8dd518b20b05eb07fe2ab024616e986a85ad5dd (diff) | |
parent | 29c4c67185ebab213ce0b54a9292250e0f45a180 (diff) |
Merge branch linux-tegra-2.6.36 into android-tegra-2.6.36
Change-Id: I870875673113113940a47d30010683e51b12a27b
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/video/tegra/dc/dc.c | 12 | ||||
-rw-r--r-- | drivers/video/tegra/dc/dc_reg.h | 4 | ||||
-rw-r--r-- | drivers/video/tegra/dc/hdmi.c | 33 | ||||
-rw-r--r-- | drivers/video/tegra/fb.c | 8 |
4 files changed, 44 insertions, 13 deletions
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c index c57a8f9ded4f..d316fde01662 100644 --- a/drivers/video/tegra/dc/dc.c +++ b/drivers/video/tegra/dc/dc.c @@ -736,6 +736,18 @@ static int tegra_dc_program_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode tegra_dc_writel(dc, DE_SELECT_ACTIVE | DE_CONTROL_NORMAL, DC_DISP_DATA_ENABLE_OPTIONS); + val = tegra_dc_readl(dc, DC_COM_PIN_OUTPUT_POLARITY1); + if (mode->flags & TEGRA_DC_MODE_FLAG_NEG_V_SYNC) + val |= PIN1_LVS_OUTPUT; + else + val &= ~PIN1_LVS_OUTPUT; + + if (mode->flags & TEGRA_DC_MODE_FLAG_NEG_H_SYNC) + val |= PIN1_LHS_OUTPUT; + else + val &= ~PIN1_LHS_OUTPUT; + tegra_dc_writel(dc, val, DC_COM_PIN_OUTPUT_POLARITY1); + /* TODO: MIPI/CRT/HDMI clock cals */ val = DISP_DATA_FORMAT_DF1P1C; diff --git a/drivers/video/tegra/dc/dc_reg.h b/drivers/video/tegra/dc/dc_reg.h index bd1750b78e44..ab21c6eba0e1 100644 --- a/drivers/video/tegra/dc/dc_reg.h +++ b/drivers/video/tegra/dc/dc_reg.h @@ -128,6 +128,10 @@ #define DC_COM_PIN_OUTPUT_SELECT4 0x318 #define DC_COM_PIN_OUTPUT_SELECT5 0x319 #define DC_COM_PIN_OUTPUT_SELECT6 0x31a + +#define PIN1_LHS_OUTPUT (1 << 30) +#define PIN1_LVS_OUTPUT (1 << 28) + #define DC_COM_PIN_MISC_CONTROL 0x31b #define DC_COM_PM0_CONTROL 0x31c #define DC_COM_PM0_DUTY_CYCLE 0x31d diff --git a/drivers/video/tegra/dc/hdmi.c b/drivers/video/tegra/dc/hdmi.c index 006529d78101..dd2a51195880 100644 --- a/drivers/video/tegra/dc/hdmi.c +++ b/drivers/video/tegra/dc/hdmi.c @@ -90,7 +90,7 @@ const struct fb_videomode tegra_dc_hdmi_supported_modes[] = { .right_margin = 16, /* h_front_porch */ .lower_margin = 9, /* v_front_porch */ .vmode = FB_VMODE_NONINTERLACED, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .sync = 0, }, /* 640x480p 60hz: EIA/CEA-861-B Format 1 */ @@ -105,7 +105,7 @@ const struct fb_videomode tegra_dc_hdmi_supported_modes[] = { .right_margin = 16, /* h_front_porch */ .lower_margin = 10, /* v_front_porch */ .vmode = FB_VMODE_NONINTERLACED, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .sync = 0, }, /* 720x576p 50hz EIA/CEA-861-B Formats 17 & 18 */ @@ -120,7 +120,7 @@ const struct fb_videomode tegra_dc_hdmi_supported_modes[] = { .right_margin = 12, /* h_front_porch */ .lower_margin = 5, /* v_front_porch */ .vmode = FB_VMODE_NONINTERLACED, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .sync = 0, }, /* 1920x1080p 59.94/60hz EIA/CEA-861-B Format 16 */ @@ -1064,16 +1064,23 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc) val = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PWR); } while (val & SOR_PWR_SETTING_NEW_PENDING); - tegra_hdmi_writel(hdmi, - SOR_STATE_ASY_CRCMODE_COMPLETE | - SOR_STATE_ASY_OWNER_HEAD0 | - SOR_STATE_ASY_SUBOWNER_BOTH | - SOR_STATE_ASY_PROTOCOL_SINGLE_TMDS_A | - /* TODO: to look at hsync polarity */ - SOR_STATE_ASY_HSYNCPOL_POS | - SOR_STATE_ASY_VSYNCPOL_POS | - SOR_STATE_ASY_DEPOL_POS, - HDMI_NV_PDISP_SOR_STATE2); + val = SOR_STATE_ASY_CRCMODE_COMPLETE | + SOR_STATE_ASY_OWNER_HEAD0 | + SOR_STATE_ASY_SUBOWNER_BOTH | + SOR_STATE_ASY_PROTOCOL_SINGLE_TMDS_A | + SOR_STATE_ASY_DEPOL_POS; + + if (dc->mode.flags & TEGRA_DC_MODE_FLAG_NEG_H_SYNC) + val |= SOR_STATE_ASY_HSYNCPOL_NEG; + else + val |= SOR_STATE_ASY_HSYNCPOL_POS; + + if (dc->mode.flags & TEGRA_DC_MODE_FLAG_NEG_V_SYNC) + val |= SOR_STATE_ASY_VSYNCPOL_NEG; + else + val |= SOR_STATE_ASY_VSYNCPOL_POS; + + tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_STATE2); val = SOR_STATE_ASY_HEAD_OPMODE_AWAKE | SOR_STATE_ASY_ORMODE_NORMAL; tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_STATE1); diff --git a/drivers/video/tegra/fb.c b/drivers/video/tegra/fb.c index 5d6a11a4ba55..4f8a5c0270f7 100644 --- a/drivers/video/tegra/fb.c +++ b/drivers/video/tegra/fb.c @@ -194,6 +194,14 @@ static int tegra_fb_set_par(struct fb_info *info) mode.h_front_porch = info->mode->right_margin; mode.v_front_porch = info->mode->lower_margin; + mode.flags = 0; + + if (!(info->mode->sync & FB_SYNC_HOR_HIGH_ACT)) + mode.flags |= TEGRA_DC_MODE_FLAG_NEG_H_SYNC; + + if (!(info->mode->sync & FB_SYNC_VERT_HIGH_ACT)) + mode.flags |= TEGRA_DC_MODE_FLAG_NEG_V_SYNC; + tegra_dc_set_mode(tegra_fb->win->dc, &mode); tegra_fb->win->w = info->mode->xres; |