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| author | Songhee Baek <sbaek@nvidia.com> | 2012-07-06 11:26:40 -0700 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2012-07-09 16:39:17 -0700 |
| commit | 6e8cab5c151fea6cbe81b50af1c50da1416ade1e (patch) | |
| tree | b83cea1f103bc10c9e44f487e823eeb28f6db7f4 /drivers | |
| parent | dc740e3692d951b15a598644f10f298e72d4312f (diff) | |
video: tegra: host: t30: Add syncpt/epp in ISP ch
This change is for programming VI and EPP through ISP channel
to support RGB input and dual video capturing.
1. Added syncpt in the ISP channel to submit the channel.
2. Added epp clock to use VI2EPP for RGB capture.
Note: To use this channel, EPP should be free from 2D.
Bug 988546
Change-Id: I17fe278c9325aac2ea1e29cbaf50c8a4499d8551
Signed-off-by: Songhee Baek <sbaek@nvidia.com>
Reviewed-on: http://git-master/r/113965
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/video/tegra/host/t30/t30.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/video/tegra/host/t30/t30.c b/drivers/video/tegra/host/t30/t30.c index 4d042a985fe1..0c8d626a4d67 100644 --- a/drivers/video/tegra/host/t30/t30.c +++ b/drivers/video/tegra/host/t30/t30.c @@ -166,7 +166,11 @@ static struct nvhost_device tegra_isp01_device = { .resource = isp_resources_t20, .num_resources = ARRAY_SIZE(isp_resources_t20), .index = 3, - .syncpts = 0, + .syncpts = BIT(NVSYNCPT_VI_ISP_2) | BIT(NVSYNCPT_VI_ISP_3) | + BIT(NVSYNCPT_VI_ISP_4), + .clocks = { {"epp", 0} + }, + .keepalive = true, NVHOST_MODULE_NO_POWERGATE_IDS, NVHOST_DEFAULT_CLOCKGATE_DELAY, .moduleid = NVHOST_MODULE_ISP, |