diff options
| author | Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> | 2014-02-20 10:28:46 -0600 |
|---|---|---|
| committer | Jiri Slaby <jslaby@suse.cz> | 2015-06-02 11:42:06 +0200 |
| commit | 2b419962df81739e1c643c37f01eea88761039b3 (patch) | |
| tree | 9b99f6695acae0237b6a422c3de701a96c771958 /drivers | |
| parent | c4f02d5466f24128c097d03752e4d1283058824b (diff) | |
amd64_edac: Add support for newer F16h models
commit 85a8885bd0e00569108aa7b5e26b89c752e3cd51 upstream.
Extend ECC decoding support for F16h M30h. Tested on F16h M30h with ECC
turned on using mce_amd_inj module and the patch works fine.
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Link: http://lkml.kernel.org/r/1392913726-16961-1-git-send-email-Aravind.Gopalakrishnan@amd.com
Tested-by: Arindam Nath <Arindam.Nath@amd.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/edac/amd64_edac.c | 24 | ||||
| -rw-r--r-- | drivers/edac/amd64_edac.h | 3 |
2 files changed, 27 insertions, 0 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 10162af430c5..7a7d5d5d7d6d 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1806,6 +1806,17 @@ static struct amd64_family_type amd64_family_types[] = { .read_dct_pci_cfg = f10_read_dct_pci_cfg, } }, + [F16_M30H_CPUS] = { + .ctl_name = "F16h_M30h", + .f1_id = PCI_DEVICE_ID_AMD_16H_M30H_NB_F1, + .f3_id = PCI_DEVICE_ID_AMD_16H_M30H_NB_F3, + .ops = { + .early_channel_count = f1x_early_channel_count, + .map_sysaddr_to_csrow = f1x_map_sysaddr_to_csrow, + .dbam_to_cs = f16_dbam_to_chip_select, + .read_dct_pci_cfg = f10_read_dct_pci_cfg, + } + }, }; /* @@ -2596,6 +2607,11 @@ static struct amd64_family_type *amd64_per_family_init(struct amd64_pvt *pvt) break; case 0x16: + if (pvt->model == 0x30) { + fam_type = &amd64_family_types[F16_M30H_CPUS]; + pvt->ops = &amd64_family_types[F16_M30H_CPUS].ops; + break; + } fam_type = &amd64_family_types[F16_CPUS]; pvt->ops = &amd64_family_types[F16_CPUS].ops; break; @@ -2848,6 +2864,14 @@ static DEFINE_PCI_DEVICE_TABLE(amd64_pci_table) = { .class = 0, .class_mask = 0, }, + { + .vendor = PCI_VENDOR_ID_AMD, + .device = PCI_DEVICE_ID_AMD_16H_M30H_NB_F2, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + .class = 0, + .class_mask = 0, + }, {0, } }; diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index d2443cfa0698..eff9eed80353 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -176,6 +176,8 @@ #define PCI_DEVICE_ID_AMD_15H_NB_F2 0x1602 #define PCI_DEVICE_ID_AMD_16H_NB_F1 0x1531 #define PCI_DEVICE_ID_AMD_16H_NB_F2 0x1532 +#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F1 0x1581 +#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F2 0x1582 /* * Function 1 - Address Map @@ -308,6 +310,7 @@ enum amd_families { F15_CPUS, F15_M30H_CPUS, F16_CPUS, + F16_M30H_CPUS, NUM_FAMILIES, }; |