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authorQuinn Jensen <quinn.jensen@freescale.com>2007-05-24 18:03:53 -0600
committerQuinn Jensen <quinn.jensen@freescale.com>2007-05-24 18:03:53 -0600
commitabcf741d99ebdf68cd8eb1903e1bf8aa9d81c691 (patch)
tree1a0ab220232986f20e8b1b75a70d23596b31ace3 /drivers
parent73f19b619ef22b8212274bcda88faa1658ed5159 (diff)
CR TLSbo86671: Support standard clk API
This patch replaces MXC clock API with standard linux clk_xxx API. All chips and drivers are updated for the new API. http://www.bitshrine.org/gpp/linux-2.6.19.2-mx-use_std_clk_api.patch
Diffstat (limited to 'drivers')
-rw-r--r--drivers/char/mxc_rtc.c8
-rw-r--r--drivers/char/mxc_rtc.h3
-rw-r--r--drivers/char/watchdog/mxc_wdt.c7
-rw-r--r--drivers/i2c/busses/mxc_i2c.c15
-rw-r--r--drivers/ide/arm/mxc_ide.c19
-rw-r--r--drivers/input/keyboard/mxc_keyb.c13
-rw-r--r--drivers/media/video/mxc/capture/mc521da.c3
-rw-r--r--drivers/media/video/mxc/capture/mt9v111.c15
-rw-r--r--drivers/media/video/mxc/capture/mx27_csi.c16
-rw-r--r--drivers/media/video/mxc/capture/mx27_prphw.c12
-rw-r--r--drivers/media/video/mxc/capture/mx27_prpsw.c5
-rw-r--r--drivers/media/video/mxc/capture/sensor_clock.c36
-rw-r--r--drivers/media/video/mxc/output/mx27_pp.c14
-rw-r--r--drivers/mmc/mxc_mmc.c25
-rw-r--r--drivers/mtd/nand/mxc_nd.c35
-rw-r--r--drivers/mxc/ipu/ipu_adc.c23
-rw-r--r--drivers/mxc/ipu/ipu_common.c20
-rw-r--r--drivers/mxc/ipu/ipu_csi.c7
-rw-r--r--drivers/mxc/ipu/ipu_lpmc.c30
-rw-r--r--drivers/mxc/ipu/ipu_prv.h6
-rw-r--r--drivers/mxc/ipu/ipu_sdc.c4
-rw-r--r--drivers/mxc/pm/dptc.c7
-rw-r--r--drivers/mxc/pm/dptc_mx27.c114
-rw-r--r--drivers/mxc/pm/dvfs_dptc.c26
-rw-r--r--drivers/mxc/security/mxc_rtic.c11
-rw-r--r--drivers/mxc/security/mxc_scc.c18
-rw-r--r--drivers/mxc/security/mxc_scc_internals.h5
-rw-r--r--drivers/mxc/security/sahara2/include/linux_port.h4
-rw-r--r--drivers/mxc/security/sahara2/sah_driver_interface.c10
-rw-r--r--drivers/mxc/ssi/ssi.c3
-rw-r--r--drivers/mxc/vpu/mxc_vpu.c13
-rw-r--r--drivers/net/fec.c24
-rw-r--r--drivers/net/irda/mxc_ir.c54
-rw-r--r--drivers/pcmcia/mx31ads-pcmcia.c10
-rw-r--r--drivers/pcmcia/mx31ads-pcmcia.h4
-rw-r--r--drivers/serial/mxc_uart.c16
-rw-r--r--drivers/spi/mxc_spi.c25
-rw-r--r--drivers/video/mxc/mx2fb.c22
-rw-r--r--drivers/w1/masters/mxc_w1.c21
39 files changed, 412 insertions, 291 deletions
diff --git a/drivers/char/mxc_rtc.c b/drivers/char/mxc_rtc.c
index 0a1c893215f5..30299a43d6fe 100644
--- a/drivers/char/mxc_rtc.c
+++ b/drivers/char/mxc_rtc.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -17,6 +17,7 @@
#include <linux/interrupt.h>
#include <linux/rtc.h>
#include <linux/platform_device.h>
+#include <linux/clk.h>
#include <asm/rtc.h>
#include <asm/mach/time.h>
#include <asm/uaccess.h>
@@ -523,12 +524,15 @@ static struct timespec mxc_rtc_delta;
static int __init mxc_rtc_probe(struct platform_device *pdev)
{
+ struct clk *clkp;
struct timespec tv;
struct rtc_time temp_time;
u32 sec;
int ret;
- mxc_clks_enable(RTC_CLK);
+ clkp = clk_get(&pdev->dev, "rtc_clk");
+ clk_enable(clkp);
+
/* Configure and enable the RTC */
if ((ret =
request_irq(INT_RTC, mxc_rtc_interrupt, 0, "rtc", NULL)) != 0) {
diff --git a/drivers/char/mxc_rtc.h b/drivers/char/mxc_rtc.h
index 5657bf52f729..f2ac39d71bdc 100644
--- a/drivers/char/mxc_rtc.h
+++ b/drivers/char/mxc_rtc.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -14,7 +14,6 @@
#define __MXC_RTC_H__
#include <asm/hardware.h>
-#include <asm/arch/clock.h>
#define RTC_INPUT_CLK_32768HZ
/*
#define RTC_INPUT_CLK_32000HZ
diff --git a/drivers/char/watchdog/mxc_wdt.c b/drivers/char/watchdog/mxc_wdt.c
index 49fc4f2853ac..303f927e8b02 100644
--- a/drivers/char/watchdog/mxc_wdt.c
+++ b/drivers/char/watchdog/mxc_wdt.c
@@ -3,7 +3,7 @@
*
* Watchdog driver for FSL MXC. It is based on omap1610_wdt.c
*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
* 2005 (c) MontaVista Software, Inc. All Rights Reserved.
* This program is free software; you can redistribute it and/or modify
@@ -51,6 +51,7 @@
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/moduleparam.h>
+#include <linux/clk.h>
#include <asm/io.h>
#include <asm/uaccess.h>
@@ -66,6 +67,7 @@
#define WDOG_COUNT_TO_SEC(c) ((c >> 8) / 2)
static int mxc_wdt_users;
+static struct clk *mxc_wdt_clk;
static unsigned int timer_margin = TIMER_MARGIN_DEFAULT;
module_param(timer_margin, uint, 0);
@@ -250,6 +252,9 @@ static int __init mxc_wdt_probe(struct platform_device *pdev)
mxc_wdt_miscdev.dev = &pdev->dev;
+ mxc_wdt_clk = clk_get(NULL, "wdog_clk");
+ clk_enable(mxc_wdt_clk);
+
ret = misc_register(&mxc_wdt_miscdev);
if (ret)
goto fail;
diff --git a/drivers/i2c/busses/mxc_i2c.c b/drivers/i2c/busses/mxc_i2c.c
index 40ac53566255..a288868407d2 100644
--- a/drivers/i2c/busses/mxc_i2c.c
+++ b/drivers/i2c/busses/mxc_i2c.c
@@ -30,10 +30,9 @@
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
-
+#include <linux/clk.h>
#include <asm/irq.h>
#include <asm/io.h>
-#include <asm/arch/clock.h>
#include "mxc_i2c_reg.h"
/*!
@@ -68,9 +67,9 @@ typedef struct {
unsigned int clkdiv;
/*!
- * The default clock source to be used.
+ * The clock source for the device.
*/
- enum mxc_clocks clk;
+ struct clk *clk;
/*!
* The current power state of the device
@@ -373,7 +372,7 @@ static int mxc_i2c_writebytes(mxc_i2c_device * dev, struct i2c_msg *msg,
*/
static void mxc_i2c_module_en(mxc_i2c_device * dev, int trans_flag)
{
- mxc_clks_enable(dev->clk);
+ clk_enable(dev->clk);
/* Set the frequency divider */
writew(dev->clkdiv, dev->membase + MXC_IFDR);
/* Clear the status register */
@@ -391,7 +390,7 @@ static void mxc_i2c_module_en(mxc_i2c_device * dev, int trans_flag)
static void mxc_i2c_module_dis(mxc_i2c_device * dev)
{
writew(0x0, dev->membase + MXC_I2CR);
- mxc_clks_disable(dev->clk);
+ clk_disable(dev->clk);
}
/*!
@@ -668,7 +667,8 @@ static int mxci2c_probe(struct platform_device *pdev)
gpio_i2c_active(id);
- clk_freq = mxc_get_clocks(i2c_plat_data->clk);
+ mxc_i2c->clk = clk_get(&pdev->dev, "i2c_clk");
+ clk_freq = clk_get_rate(mxc_i2c->clk);
mxc_i2c->clkdiv = -1;
if (i2c_plat_data->i2c_clk) {
/* Calculate divider and round up any fractional part */
@@ -729,6 +729,7 @@ static int mxci2c_remove(struct platform_device *pdev)
free_irq(mxc_i2c->irq, mxc_i2c);
i2c_del_adapter(&mxc_i2c->adap);
gpio_i2c_inactive(id);
+ clk_put(mxc_i2c->clk);
platform_set_drvdata(pdev, NULL);
return 0;
}
diff --git a/drivers/ide/arm/mxc_ide.c b/drivers/ide/arm/mxc_ide.c
index 6577236d99cf..79c47675e7d5 100644
--- a/drivers/ide/arm/mxc_ide.c
+++ b/drivers/ide/arm/mxc_ide.c
@@ -5,7 +5,7 @@
* Copyright (c) 2003-2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -36,6 +36,7 @@
#include <linux/ide.h>
#include <linux/init.h>
#include <linux/ide.h>
+#include <linux/clk.h>
#include <asm/mach-types.h>
@@ -43,8 +44,6 @@
#include <asm/irq.h>
#include <asm/delay.h>
#include <asm/hardware.h>
-#include <asm/arch/board.h>
-#include <asm/arch/clock.h>
#include <asm/arch/dma.h>
#include "mxc_ide.h"
@@ -53,6 +52,8 @@ extern void gpio_ata_inactive(void);
static int mxc_ide_config_drive(ide_drive_t * drive, u8 xfer_mode);
static void mxc_ide_dma_callback(void *arg, int error, unsigned int count);
+static struct clk *ata_clk;
+
/* List of registered interfaces */
static ide_hwif_t *ifs[1];
@@ -161,7 +162,7 @@ static struct {
static int set_ata_bus_timing(int speed, enum ata_mode mode)
{
/* get the bus clock cycle time, in ns */
- int T = 1 * 1000 * 1000 * 1000 / mxc_get_clocks(ATA_BASE_CLK);
+ int T = 1 * 1000 * 1000 * 1000 / clk_get_rate(ata_clk);
mxc_ide_time_cfg_t cfg0, cfg1, cfg2, cfg3, cfg4, cfg5;
/* every mode gets the same t_off and t_on */
@@ -1016,6 +1017,10 @@ static int __init mxc_ide_init(void)
/* Configure the pads */
gpio_ata_active();
+ /* Enable the ata clock */
+ ata_clk = clk_get(NULL, "ata_clk");
+ clk_enable(ata_clk);
+
/* Deassert the reset bit to enable the interface */
ATA_RAW_WRITE(MXC_IDE_CTRL_ATA_RST_B, MXC_IDE_ATA_CONTROL);
@@ -1107,6 +1112,12 @@ static void __exit mxc_ide_exit(void)
PBC_ATA_SIGNAL_INACTIVE();
/*
+ * Turn off the clock
+ */
+ clk_disable(ata_clk);
+ clk_put(ata_clk);
+
+ /*
* Free the pins
*/
gpio_ata_inactive();
diff --git a/drivers/input/keyboard/mxc_keyb.c b/drivers/input/keyboard/mxc_keyb.c
index f01cc2342df6..0c0677948bf5 100644
--- a/drivers/input/keyboard/mxc_keyb.c
+++ b/drivers/input/keyboard/mxc_keyb.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -55,8 +55,8 @@
#include <linux/miscdevice.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
+#include <linux/clk.h>
#include <asm/mach/keypad.h>
-#include <asm/arch/clock.h>
/*
* Module header file
@@ -74,6 +74,9 @@ static unsigned int key_pad_enabled;
/*! Input device structure. */
static struct input_dev *mxckbd_dev = NULL;
+/*! KPP clock handle. */
+static struct clk *kpp_clk;
+
/*! This static variable indicates whether a key event is pressed/released. */
static unsigned short KPress;
@@ -757,7 +760,8 @@ static int mxc_kpp_probe(struct platform_device *pdev)
}
/* Enable keypad clock */
- mxc_clks_enable(KPP_CLK);
+ kpp_clk = clk_get(&pdev->dev, "kpp_clk");
+ clk_enable(kpp_clk);
/* IOMUX configuration for keypad */
gpio_keypad_active();
@@ -912,7 +916,8 @@ static int mxc_kpp_remove(struct platform_device *pdev)
__raw_writew(reg_val, KPSR);
gpio_keypad_inactive();
- mxc_clks_disable(KPP_CLK);
+ clk_disable(kpp_clk);
+ clk_put(kpp_clk);
KPress = 0;
diff --git a/drivers/media/video/mxc/capture/mc521da.c b/drivers/media/video/mxc/capture/mc521da.c
index 03d897898979..55ddc249a959 100644
--- a/drivers/media/video/mxc/capture/mc521da.c
+++ b/drivers/media/video/mxc/capture/mc521da.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -29,7 +29,6 @@
#include <linux/i2c.h>
#include <asm/arch/mxc_i2c.h>
#include "mxc_v4l2_capture.h"
-#include <asm/arch/clock.h>
#define MC521DA_I2C_ADDRESS 0x22
#define MC521DA_TERM 0xFF
diff --git a/drivers/media/video/mxc/capture/mt9v111.c b/drivers/media/video/mxc/capture/mt9v111.c
index f2f918a1c66c..954745c566c5 100644
--- a/drivers/media/video/mxc/capture/mt9v111.c
+++ b/drivers/media/video/mxc/capture/mt9v111.c
@@ -27,6 +27,7 @@
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/i2c.h>
+#include <linux/clk.h>
#include <asm/arch/mxc_i2c.h>
#include "mxc_v4l2_capture.h"
#include "mt9v111.h"
@@ -598,7 +599,6 @@ static int mt9v111_detect_client(struct i2c_adapter *adapter, int address,
return -1;
}
- mxc_clks_disable(CSI_BAUD);
printk(KERN_INFO "MT9V111 Detected\n");
return 0;
@@ -618,10 +618,19 @@ I2C_CLIENT_INSMOD;
static int mt9v111_attach(struct i2c_adapter *adap)
{
uint32_t mclk = 27000000;
- mxc_clks_enable(CSI_BAUD);
+ struct clk *clk;
+ int err;
+
+ clk = clk_get(NULL, "csi_clk");
+ clk_enable(clk);
set_mclk_rate(&mclk);
- return i2c_probe(adap, &addr_data, &mt9v111_detect_client);
+ err = i2c_probe(adap, &addr_data, &mt9v111_detect_client);
+
+ clk_disable(clk);
+ clk_put(clk);
+
+ return err;
}
/*!
diff --git a/drivers/media/video/mxc/capture/mx27_csi.c b/drivers/media/video/mxc/capture/mx27_csi.c
index be5dd02d3542..4d3b3cb0f576 100644
--- a/drivers/media/video/mxc/capture/mx27_csi.c
+++ b/drivers/media/video/mxc/capture/mx27_csi.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -23,11 +23,11 @@
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
-#include <asm/arch/hardware.h>
#include <linux/spinlock.h>
#include <linux/delay.h>
-#include <asm/arch/clock.h>
#include <linux/module.h>
+#include <linux/clk.h>
+#include <asm/arch/hardware.h>
#include "mx27_csi.h"
@@ -247,12 +247,17 @@ void csi_set_callback(csi_irq_callback_t callback, void *data)
g_callback_data = data;
}
+static struct clk *csi_clk;
+
int32_t __init csi_init_module(void)
{
int ret = 0;
- mxc_clks_enable(CSI_BAUD);
+ csi_clk = clk_get(NULL, "csi_clk");
+ clk_enable(csi_clk);
+
csihw_reset();
+ csi_enable_mclk(0, 1, 0);
/* interrupt enable */
ret = request_irq(INT_CSI, csi_irq_handler, 0, "csi", 0);
@@ -267,7 +272,8 @@ void __exit csi_cleanup_module(void)
/* free irq */
free_irq(INT_CSI, 0);
- mxc_clks_disable(CSI_BAUD);
+ clk_disable(csi_clk);
+ clk_put(csi_clk);
}
module_init(csi_init_module);
diff --git a/drivers/media/video/mxc/capture/mx27_prphw.c b/drivers/media/video/mxc/capture/mx27_prphw.c
index c0876b96f5e1..c56a6df1716e 100644
--- a/drivers/media/video/mxc/capture/mx27_prphw.c
+++ b/drivers/media/video/mxc/capture/mx27_prphw.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -21,7 +21,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
-#include <asm/arch/clock.h>
+#include <linux/clk.h>
#include <asm/io.h>
#include <linux/delay.h>
@@ -1078,12 +1078,15 @@ int prphw_isr(void)
return status;
}
+static struct clk *emma_clk;
+
/*!
* @brief PrP module clock enable
*/
void prphw_init(void)
{
- mxc_clks_enable(EMMA_PRP_CLK);
+ emma_clk = clk_get(NULL, "emma_clk");
+ clk_enable(emma_clk);
}
/*!
@@ -1091,5 +1094,6 @@ void prphw_init(void)
*/
void prphw_exit(void)
{
- mxc_clks_disable(EMMA_PRP_CLK);
+ clk_disable(emma_clk);
+ clk_put(emma_clk);
}
diff --git a/drivers/media/video/mxc/capture/mx27_prpsw.c b/drivers/media/video/mxc/capture/mx27_prpsw.c
index 8e211bb1a993..c444f95a6f82 100644
--- a/drivers/media/video/mxc/capture/mx27_prpsw.c
+++ b/drivers/media/video/mxc/capture/mx27_prpsw.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -23,7 +23,6 @@
#include <linux/string.h>
#include <linux/fb.h>
#include <linux/pci.h>
-#include <asm/arch/clock.h>
#include <asm/io.h>
#include <asm/irq.h>
@@ -41,7 +40,7 @@ static emma_prp_cfg g_prp_cfg;
static int g_vfbuf, g_rotbuf;
static struct tasklet_struct prp_vf_tasklet;
-/*
+/*
* The following variables represents the virtual address for the cacheable
* buffers accessed by SW rotation/mirroring. The rotation/mirroring in
* cacheable buffers has significant performance improvement than it in
diff --git a/drivers/media/video/mxc/capture/sensor_clock.c b/drivers/media/video/mxc/capture/sensor_clock.c
index c3681ce25e10..2bf42b3fb872 100644
--- a/drivers/media/video/mxc/capture/sensor_clock.c
+++ b/drivers/media/video/mxc/capture/sensor_clock.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -18,12 +18,11 @@
*
* @ingroup Camera
*/
-
#include <linux/init.h>
#include <linux/ctype.h>
#include <linux/types.h>
#include <linux/device.h>
-#include "asm/arch/clock.h"
+#include <linux/clk.h>
/*
* set_mclk_rate
@@ -33,25 +32,26 @@
*/
void set_mclk_rate(uint32_t * p_mclk_freq)
{
- uint32_t div;
- // Calculate the divider using the requested, minimum mclk freq
- div = mxc_get_clocks_parent(CSI_BAUD) / *p_mclk_freq;
- /* Calculate and return the actual mclk frequency.
- The integer division error/truncation will ensure the actual freq is
- greater than the requested freq.
+ struct clk *clk;
+ int i;
+ uint32_t freq = 0;
+ uint32_t step = *p_mclk_freq / 8;
+
+ clk = clk_get(NULL, "csi_clk");
+
+ /* clk_round_rate rounds down, but we need it rounded up
+ * So we try 9 steps up to 2x the requested freq.
*/
- if (*p_mclk_freq < mxc_get_clocks_parent(CSI_BAUD) / div) {
- div++;
+ for (i = 0; i <= 8; i++) {
+ freq = clk_round_rate(clk, *p_mclk_freq + (i * step));
+ if (freq >= *p_mclk_freq)
+ break;
}
+ clk_set_rate(clk, freq);
- *p_mclk_freq = mxc_get_clocks_parent(CSI_BAUD) / div;
-
-#ifdef CONFIG_MXC_EMMA
- mxc_set_clocks_div(CSI_BAUD, div / 2);
-#else
- mxc_set_clocks_div(CSI_BAUD, div * 2);
-#endif
+ *p_mclk_freq = freq;
+ clk_put(clk);
pr_debug("mclk frequency = %d\n", *p_mclk_freq);
}
diff --git a/drivers/media/video/mxc/output/mx27_pp.c b/drivers/media/video/mxc/output/mx27_pp.c
index 67598d571510..7d2785a71faf 100644
--- a/drivers/media/video/mxc/output/mx27_pp.c
+++ b/drivers/media/video/mxc/output/mx27_pp.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -24,9 +24,9 @@
#include <linux/string.h>
#include <linux/module.h>
#include <linux/fb.h>
-#include <asm/irq.h>
+#include <linux/clk.h>
+#include <linux/interrupt.h>
#include <asm/io.h>
-#include <asm/arch/clock.h>
#include "mx27_pp.h"
#include "mxc_v4l2_output.h"
@@ -883,12 +883,15 @@ static int pphw_isr(void)
return status;
}
+static struct clk *emma_clk;
+
/*!
* @brief PP module clock enable
*/
static void pphw_init(void)
{
- mxc_clks_enable(EMMA_PP_CLK);
+ emma_clk = clk_get(NULL, "emma_clk");
+ clk_enable(emma_clk);
}
/*!
@@ -896,5 +899,6 @@ static void pphw_init(void)
*/
static void pphw_exit(void)
{
- mxc_clks_disable(EMMA_PP_CLK);
+ clk_disable(emma_clk);
+ clk_put(emma_clk);
}
diff --git a/drivers/mmc/mxc_mmc.c b/drivers/mmc/mxc_mmc.c
index d4dc716dc021..45afb8dcc75a 100644
--- a/drivers/mmc/mxc_mmc.c
+++ b/drivers/mmc/mxc_mmc.c
@@ -12,7 +12,7 @@
*/
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -52,6 +52,7 @@
#include <linux/mmc/protocol.h>
#include <linux/delay.h>
#include <linux/timer.h>
+#include <linux/clk.h>
#include <asm/dma.h>
#include <asm/io.h>
@@ -62,7 +63,6 @@
#include <asm/arch/mmc.h>
#include "mxc_mmc.h"
-#include <asm/arch/clock.h>
#if defined(CONFIG_MXC_MC13783_POWER)
#include <asm/arch/pmic_power.h>
@@ -232,7 +232,7 @@ struct mxcmci_host {
/*!
* Clock id to hold ipg_perclk.
*/
- enum mxc_clocks clock_id;
+ struct clk *clk;
/*!
* MMC mode.
*/
@@ -812,7 +812,7 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
u32 intctrl;
if (host->mxc_mmc_suspend_flag == 1) {
- mxc_clks_enable(host->clock_id);
+ clk_enable(host->clk);
}
status = __raw_readl(host->base + MMC_STATUS);
@@ -895,7 +895,7 @@ static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
struct mxcmci_host *host = mmc_priv(mmc);
/*This variable holds the value of clock prescaler */
int prescaler;
- int clk_rate = mxc_get_clocks(host->clock_id);
+ int clk_rate = clk_get_rate(host->clk);
#ifdef MXC_MMC_DMA_ENABLE
mxc_dma_device_t dev_id = 0;
#endif
@@ -1241,16 +1241,12 @@ static int mxcmci_probe(struct platform_device *pdev)
goto out;
}
- if (pdev->id == 0) {
- host->clock_id = SDHC1_CLK;
- } else {
- host->clock_id = SDHC2_CLK;
- }
+ host->clk = clk_get(&pdev->dev, "sdhc_clk");
+ clk_enable(host->clk);
mmc->f_min = mmc_plat->min_clk;
mmc->f_max = mmc_plat->max_clk;
- pr_debug("SDHC:%d clock:%lu\n", pdev->id,
- mxc_get_clocks(host->clock_id));
+ pr_debug("SDHC:%d clock:%lu\n", pdev->id, clk_get_rate(host->clk));
spin_lock_init(&host->lock);
host->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1343,6 +1339,7 @@ static int mxcmci_probe(struct platform_device *pdev)
release_mem_region(pdev->resource[0].start,
pdev->resource[0].end - pdev->resource[0].start + 1);
out:
+ clk_disable(host->clk);
mmc_free_host(mmc);
platform_set_drvdata(pdev, NULL);
return ret;
@@ -1413,7 +1410,7 @@ static int mxcmci_suspend(struct platform_device *pdev, pm_message_t state)
reg &= ~INT_CNTR_SDIO_INT_WKP_EN;
__raw_writel(reg, host->base + MMC_INT_CNTR);
}
- mxc_clks_disable(host->clock_id);
+ clk_disable(host->clk);
return ret;
}
@@ -1448,7 +1445,7 @@ static int mxcmci_resume(struct platform_device *pdev)
ret = mmc_resume_host(mmc);
host->mxc_mmc_suspend_flag = 0;
}
- mxc_clks_enable(host->clock_id);
+ clk_enable(host->clk);
if (host->sdio_set_wake_enable == 1) {
reg = __raw_readl(host->base + MMC_INT_CNTR);
reg &= ~INT_CNTR_SDIO_INT_WKP_EN;
diff --git a/drivers/mtd/nand/mxc_nd.c b/drivers/mtd/nand/mxc_nd.c
index 851f12e48376..353074a69d1d 100644
--- a/drivers/mtd/nand/mxc_nd.c
+++ b/drivers/mtd/nand/mxc_nd.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -20,10 +20,10 @@
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/platform_device.h>
+#include <linux/clk.h>
#include <linux/err.h>
#include <linux/mtd/partitions.h>
#include <asm/mach/flash.h>
-#include <asm/arch/clock.h>
#include <asm/io.h>
#include "mxc_nd.h"
@@ -77,6 +77,8 @@ static int Ecc_disabled;
static int is2k_Pagesize = 0;
+static struct clk *nfc_clk;
+
/*
* OOB placement block for use with hardware ecc generation
*/
@@ -190,7 +192,7 @@ static void send_addr(u16 addr, bool islast)
* This function requests the NANDFC to initate the transfer
* of data currently in the NANDFC RAM buffer to the NAND device.
*
- * @param buf_id Specify Internal RAM Buffer number (0-3)
+ * @param buf_id Specify Internal RAM Buffer number (0-3)
* @param bSpareOnly set true if only the spare area is transferred
*/
static void send_prog_page(u8 buf_id, bool bSpareOnly)
@@ -218,7 +220,7 @@ static void send_prog_page(u8 buf_id, bool bSpareOnly)
/*!
* This function will correct the single bit ECC error
*
- * @param buf_id Specify Internal RAM Buffer number (0-3)
+ * @param buf_id Specify Internal RAM Buffer number (0-3)
* @param eccpos Ecc byte and bit position
* @param bSpareOnly set to true if only spare area needs correction
*/
@@ -252,7 +254,7 @@ static void mxc_nd_correct_error(u8 buf_id, u16 eccpos, bool bSpareOnly)
* This function will maintains state of single bit Error
* in Main & spare area
*
- * @param buf_id Specify Internal RAM Buffer number (0-3)
+ * @param buf_id Specify Internal RAM Buffer number (0-3)
* @param spare set to true if only spare area needs correction
*/
static void mxc_nd_correct_ecc(u8 buf_id, bool spare)
@@ -344,7 +346,7 @@ static void mxc_nd_correct_ecc(u8 buf_id, bool spare)
* This function requests the NANDFC to initated the transfer
* of data from the NAND device into in the NANDFC ram buffer.
*
- * @param buf_id Specify Internal RAM Buffer number (0-3)
+ * @param buf_id Specify Internal RAM Buffer number (0-3)
* @param bSpareOnly set true if only the spare area is transferred
*/
static void send_read_page(u8 buf_id, bool bSpareOnly)
@@ -455,7 +457,7 @@ static u16 get_dev_status(void)
*/
static int mxc_nand_dev_ready(struct mtd_info *mtd)
{
- /*
+ /*
* NFC handles R/B internally.Therefore,this function
* always returns status as ready.
*/
@@ -818,11 +820,11 @@ static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)
switch (chip) {
case -1:
/* Disable the NFC clock */
- mxc_clks_disable(NFC_CLK);
+ clk_disable(nfc_clk);
break;
case 0:
/* Enable the NFC clock */
- mxc_clks_enable(NFC_CLK);
+ clk_enable(nfc_clk);
break;
default:
@@ -883,11 +885,11 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
case NAND_CMD_SEQIN:
if (column >= mtd->writesize) {
if (is2k_Pagesize) {
- /**
+ /**
* FIXME: before send SEQIN command for write OOB,
- * We must read one page out.
- * For K9F1GXX has no READ1 command to set current HW
- * pointer to spare area, we must write the whole page including OOB together.
+ * We must read one page out.
+ * For K9F1GXX has no READ1 command to set current HW
+ * pointer to spare area, we must write the whole page including OOB together.
*/
/* call itself to read a page */
mxc_nand_command(mtd, NAND_CMD_READ0, 0,
@@ -1090,6 +1092,8 @@ static int __init mxcnd_probe(struct platform_device *pdev)
this->read_buf = mxc_nand_read_buf;
this->verify_buf = mxc_nand_verify_buf;
+ nfc_clk = clk_get(&pdev->dev, "nfc_clk");
+
NFC_CONFIG1 |= NFC_INT_MSK;
init_waitqueue_head(&irq_waitq);
err = request_irq(INT_NANDFC, mxc_nfc_irq, 0, "mxc_nd", NULL);
@@ -1183,6 +1187,7 @@ static int __exit mxcnd_remove(struct platform_device *pdev)
{
struct mtd_info *mtd = platform_get_drvdata(pdev);
+ clk_put(nfc_clk);
platform_set_drvdata(pdev, NULL);
if (mxc_nand_data) {
@@ -1217,7 +1222,7 @@ static int mxcnd_suspend(struct platform_device *pdev, pm_message_t state)
ret = info->suspend(info);
/* Disable the NFC clock */
- mxc_clks_disable(NFC_CLK);
+ clk_disable(nfc_clk);
return ret;
}
@@ -1238,7 +1243,7 @@ static int mxcnd_resume(struct platform_device *pdev)
DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND : NAND resume\n");
/* Enable the NFC clock */
- mxc_clks_enable(NFC_CLK);
+ clk_enable(nfc_clk);
if (info) {
info->resume(info);
diff --git a/drivers/mxc/ipu/ipu_adc.c b/drivers/mxc/ipu/ipu_adc.c
index b5e4599e6899..a784ddbbd346 100644
--- a/drivers/mxc/ipu/ipu_adc.c
+++ b/drivers/mxc/ipu/ipu_adc.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -25,7 +25,6 @@
#include <linux/spinlock.h>
#include <linux/delay.h>
#include <asm/io.h>
-#include <asm/arch/clock.h>
#include <asm/arch/ipu.h>
#include "ipu_prv.h"
@@ -219,6 +218,9 @@ int32_t ipu_adc_set_update_mode(ipu_channel_t channel,
int32_t err = 0;
uint32_t ref_per, reg, src = 0;
uint32_t lock_flags;
+ uint32_t ipu_freq;
+
+ ipu_freq = clk_get_rate(g_ipu_clk);
spin_lock_irqsave(&ipu_lock, lock_flags);
@@ -233,7 +235,7 @@ int32_t ipu_adc_set_update_mode(ipu_channel_t channel,
err = -EINVAL;
goto err0;
}
- ref_per = (refresh_rate * g_ipu_clk) / 217;
+ ref_per = (refresh_rate * ipu_freq) / 217;
ref_per--;
reg |= ref_per << FS_AUTO_REF_PER_OFFSET;
@@ -244,7 +246,7 @@ int32_t ipu_adc_set_update_mode(ipu_channel_t channel,
err = -EINVAL;
goto err0;
}
- ref_per = (refresh_rate * g_ipu_clk) / 217;
+ ref_per = (refresh_rate * ipu_freq) / 217;
ref_per--;
reg |= ref_per << FS_AUTO_REF_PER_OFFSET;
@@ -496,10 +498,13 @@ int32_t ipu_adc_init_ifc_timing(display_port_t disp, bool read,
uint32_t down_per;
uint32_t read_per;
uint32_t pixclk_per = 0;
+ uint32_t ipu_freq;
+
+ ipu_freq = clk_get_rate(g_ipu_clk);
- clk_per = (cycle_time * (g_ipu_clk / 1000L) * 16L) / 1000000L;
- up_per = (up_time * (g_ipu_clk / 1000L) * 4L) / 1000000L;
- down_per = (down_time * (g_ipu_clk / 1000L) * 4L) / 1000000L;
+ clk_per = (cycle_time * (ipu_freq / 1000L) * 16L) / 1000000L;
+ up_per = (up_time * (ipu_freq / 1000L) * 4L) / 1000000L;
+ down_per = (down_time * (ipu_freq / 1000L) * 4L) / 1000000L;
reg = (clk_per << DISPx_IF_CLK_PER_OFFSET) |
(up_per << DISPx_IF_CLK_UP_OFFSET) |
@@ -507,9 +512,9 @@ int32_t ipu_adc_init_ifc_timing(display_port_t disp, bool read,
if (read) {
read_per =
- (read_latch_time * (g_ipu_clk / 1000L) * 4L) / 1000000L;
+ (read_latch_time * (ipu_freq / 1000L) * 4L) / 1000000L;
if (pixel_clk)
- pixclk_per = (g_ipu_clk * 16L) / pixel_clk;
+ pixclk_per = (ipu_freq * 16L) / pixel_clk;
time_conf3 = (read_per << DISPx_IF_CLK_READ_EN_OFFSET) |
(pixclk_per << DISPx_PIX_CLK_PER_OFFSET);
}
diff --git a/drivers/mxc/ipu/ipu_common.c b/drivers/mxc/ipu/ipu_common.c
index b38632d4c2c5..48adbceae759 100644
--- a/drivers/mxc/ipu/ipu_common.c
+++ b/drivers/mxc/ipu/ipu_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -25,8 +25,8 @@
#include <linux/errno.h>
#include <linux/spinlock.h>
#include <linux/delay.h>
+#include <linux/clk.h>
#include <asm/io.h>
-#include <asm/arch/clock.h>
#include <asm/arch/ipu.h>
#include "ipu_prv.h"
@@ -46,8 +46,8 @@ struct ipu_irq_node {
};
/* Globals */
-uint32_t g_ipu_clk;
-uint32_t g_ipu_csi_clk;
+struct clk *g_ipu_clk;
+struct clk *g_ipu_csi_clk;
int g_ipu_irq[2];
int g_ipu_hw_rev;
bool g_sec_chan_en[21];
@@ -115,9 +115,11 @@ int ipu_probe(struct platform_device *pdev)
/* Enable IPU and CSI clocks */
/* Get IPU clock freq */
- mxc_clks_enable(IPU_CLK);
- g_ipu_clk = mxc_get_clocks(IPU_CLK);
- dev_dbg(g_ipu_dev, "g_ipu_clk = %d\n", g_ipu_clk);
+ g_ipu_clk = clk_get(&pdev->dev, "ipu_clk");
+ clk_enable(g_ipu_clk);
+ dev_dbg(g_ipu_dev, "ipu_clk = %d\n", clk_get_rate(g_ipu_clk));
+
+ g_ipu_csi_clk = clk_get(&pdev->dev, "csi_clk");
__raw_writel(0x00100010L, DI_HSP_CLK_PER);
@@ -412,10 +414,10 @@ void ipu_uninit_channel(ipu_channel_t channel)
* Setting this to a value other than NULL enables
* double buffering mode.
*
- * @param u private u offset for additional cropping,
+ * @param u private u offset for additional cropping,
* zero if not used.
*
- * @param v private v offset for additional cropping,
+ * @param v private v offset for additional cropping,
* zero if not used.
*
* @return This function returns 0 on success or negative error code on fail
diff --git a/drivers/mxc/ipu/ipu_csi.c b/drivers/mxc/ipu/ipu_csi.c
index 5d7c61c8ab6a..ece04f003f85 100644
--- a/drivers/mxc/ipu/ipu_csi.c
+++ b/drivers/mxc/ipu/ipu_csi.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -23,7 +23,6 @@
#include <linux/errno.h>
#include <linux/spinlock.h>
#include <linux/delay.h>
-#include <asm/arch/clock.h>
#include <asm/arch/ipu.h>
#include "ipu_prv.h"
@@ -141,13 +140,13 @@ int32_t ipu_csi_enable_mclk(int src, bool flag, bool wait)
return 0;
if (flag == true) {
- mxc_clks_enable(CSI_BAUD);
+ clk_enable(g_ipu_csi_clk);
if (wait == true)
msleep(10);
/*printk("enable csi clock from source %d\n", src); */
gipu_csi_get_mclk_flag = true;
} else if (csi_mclk_flag == 0) {
- mxc_clks_disable(CSI_BAUD);
+ clk_disable(g_ipu_csi_clk);
/*printk("disable csi clock from source %d\n", src); */
gipu_csi_get_mclk_flag = flag;
}
diff --git a/drivers/mxc/ipu/ipu_lpmc.c b/drivers/mxc/ipu/ipu_lpmc.c
index 62621ed11b2a..d01fdc89287b 100644
--- a/drivers/mxc/ipu/ipu_lpmc.c
+++ b/drivers/mxc/ipu/ipu_lpmc.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -20,13 +20,13 @@
*/
#include <linux/module.h>
+#include <linux/clk.h>
#include <asm/arch/ipu.h>
#ifdef CONFIG_MXC_IPU_LPMC
#include "ipu_prv.h"
#include <asm/io.h>
-#include <asm/arch/clock.h>
#include <asm/arch/mxc_pm.h>
#define LPMC_CNTL IO_ADDRESS(LPMC_BASE_ADDR + 0)
@@ -38,6 +38,9 @@
#define LPMC_CNTL_RMP_END_PTR_OFFSET 16
#define LPMC_CNTL_LPMP_END_PTR_OFFSET 24
+static struct clk *dfm_clk;
+static struct clk *lpmc_clk;
+
/*!
* This function initializes low-power self-refresh mode.
*
@@ -64,12 +67,16 @@ int ipu_lpmc_init(u32 dfm_freq,
u32 reg, lpmc_cntl;
u32 lpmc_state, previous_lpmc_state;
- mxc_set_dfm_clock(dfm_freq);
- mxc_clks_enable(LPMC_CLK);
+ lpmc_clk = clk_get(NULL, "lpmc_clk");
+ clk_enable(lpmc_clk);
+
+ dfm_clk = clk_get(NULL, "dfm_clk");
+ dfm_freq = clk_round_rate(dfm_clk, dfm_freq);
+ clk_set_rate(dfm_clk, dfm_freq);
+ clk_enable(dfm_clk);
-#ifdef CONFIG_DPM
mxc_pm_lp_ack_enable(MXC_PM_LOWPWR_ACK_IPU);
-#endif
+
lpmc_cntl = (save_count) << LPMC_CNTL_RMP_END_PTR_OFFSET;
lpmc_cntl |= (lpm_count + save_count) << LPMC_CNTL_LPMP_END_PTR_OFFSET;
__raw_writel(lpmc_cntl, LPMC_CNTL);
@@ -106,7 +113,7 @@ int ipu_lpmc_init(u32 dfm_freq,
dev_dbg(g_ipu_dev, "LPMC off - LPMC_STAT = 0x%X\n", lpmc_state);
lpmc_cntl |= LPMC_CNTL_LOW_PWR_CLK | LPMC_CNTL_LPMC_EN;
- __raw_writel(lpmc_cntl, LPMC_CNTL); /* EXIT LPMC Mode */
+ __raw_writel(lpmc_cntl, LPMC_CNTL);
dev_dbg(g_ipu_dev, "LPMC_CNTL = 0x%08X\n", lpmc_cntl);
while (lpmc_state != 0xC) {
@@ -133,9 +140,8 @@ void ipu_lpmc_uninit(void)
spin_lock_irqsave(&ipu_lock, lock_flags);
-#ifdef CONFIG_DPM
mxc_pm_lp_ack_disable(MXC_PM_LOWPWR_ACK_IPU);
-#endif
+
reg = __raw_readl(LPMC_CNTL);
reg &= ~LPMC_CNTL_LOW_PWR_CLK;
__raw_writel(reg, LPMC_CNTL); /* EXIT LPMC Mode */
@@ -152,8 +158,10 @@ void ipu_lpmc_uninit(void)
}
__raw_writel(0, LPMC_CNTL); /* Disable LPMC */
- mxc_clks_disable(LPMC_CLK);
- mxc_set_dfm_clock(0);
+ clk_disable(dfm_clk);
+ clk_disable(lpmc_clk);
+ clk_put(dfm_clk);
+ clk_put(lpmc_clk);
}
#else
diff --git a/drivers/mxc/ipu/ipu_prv.h b/drivers/mxc/ipu/ipu_prv.h
index ee07d7aa419f..d3f9d94ee7af 100644
--- a/drivers/mxc/ipu/ipu_prv.h
+++ b/drivers/mxc/ipu/ipu_prv.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -15,13 +15,15 @@
#include <linux/types.h>
#include <linux/device.h>
+#include <linux/clk.h>
#include <linux/interrupt.h>
#include <asm/arch/hardware.h>
/* Globals */
extern struct device *g_ipu_dev;
extern spinlock_t ipu_lock;
-extern uint32_t g_ipu_clk;
+extern struct clk *g_ipu_clk;
+extern struct clk *g_ipu_csi_clk;
ipu_color_space_t format_to_colorspace(uint32_t fmt);
diff --git a/drivers/mxc/ipu/ipu_sdc.c b/drivers/mxc/ipu/ipu_sdc.c
index 0d4d8be9d0a1..074177ca5a80 100644
--- a/drivers/mxc/ipu/ipu_sdc.c
+++ b/drivers/mxc/ipu/ipu_sdc.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -125,7 +125,7 @@ int32_t ipu_sdc_init_panel(ipu_panel_t panel,
/* Calculate divider */
/* fractional part is 4 bits so simply multiple by 2^4 to get fractional part */
dev_dbg(g_ipu_dev, "pixel clk = %d\n", pixel_clk);
- div = (g_ipu_clk * 16) / pixel_clk;
+ div = (clk_get_rate(g_ipu_clk) * 16) / pixel_clk;
if (div < 0x40) { /* Divider less than 4 */
dev_dbg(g_ipu_dev,
"InitPanel() - Pixel clock divider less than 1\n");
diff --git a/drivers/mxc/pm/dptc.c b/drivers/mxc/pm/dptc.c
index 9bdd3e3df1a6..b161876fd605 100644
--- a/drivers/mxc/pm/dptc.c
+++ b/drivers/mxc/pm/dptc.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -45,7 +45,6 @@
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <asm/arch/sdma.h>
-#include <asm/arch/clock.h>
#include <asm/arch/pmic_power.h>
/*
@@ -65,6 +64,10 @@
#include "../../../arch/arm/mach-mx3/crm_regs.h"
#endif
+extern unsigned long mxc_ccm_get_reg(unsigned int reg_offset);
+extern void mxc_ccm_modify_reg(unsigned int reg_offset, unsigned int mask,
+ unsigned int data);
+
/*!
* The dvfs_dptc_params structure holds all the internal DPTC driver parameters
* (current working point, current frequency, translation table and DPTC
diff --git a/drivers/mxc/pm/dptc_mx27.c b/drivers/mxc/pm/dptc_mx27.c
index f186f16c3695..59f2ddce8184 100644
--- a/drivers/mxc/pm/dptc_mx27.c
+++ b/drivers/mxc/pm/dptc_mx27.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -15,17 +15,17 @@
* @file dptc_mx27.c
*
* @brief Driver for the Freescale Semiconductor MX27 DPTC module.
- *
- * The DPTC driver is designed as a character driver which interacts with the
- * MX27 DPTC hardware. Upon initialization, the DPTC driver initializes the
- * DPTC hardware sets up driver nodes attaches to the DPTC interrupt and
- * initializes internal data structures. When the DPTC interrupt occurs the
+ *
+ * The DPTC driver is designed as a character driver which interacts with the
+ * MX27 DPTC hardware. Upon initialization, the DPTC driver initializes the
+ * DPTC hardware sets up driver nodes attaches to the DPTC interrupt and
+ * initializes internal data structures. When the DPTC interrupt occurs the
* driver checks the cause of the interrupt (lower voltage, increase voltage or
- * emergency) and changes the CPU voltage according to translation table that
- * is loaded into the driver(the voltage changes are done by calling some
- * routines in the mc13783 driver). The driver read method is used to read the
- * currently loaded DPTC translation table and the write method is used
- * in-order to update the translation table. Driver ioctls are used to change
+ * emergency) and changes the CPU voltage according to translation table that
+ * is loaded into the driver(the voltage changes are done by calling some
+ * routines in the mc13783 driver). The driver read method is used to read the
+ * currently loaded DPTC translation table and the write method is used
+ * in-order to update the translation table. Driver ioctls are used to change
* driver parameters and enable/disable the DPTC operation.
*
* @ingroup PM
@@ -35,12 +35,12 @@
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/clk.h>
#include <asm/uaccess.h>
#include <linux/workqueue.h>
#include <linux/proc_fs.h>
#include <asm/semaphore.h>
#include <linux/vmalloc.h>
-#include <asm/arch/clock.h>
#include <asm/arch/pmic_power.h>
#include <asm/arch/dvfs_dptc_struct.h>
#include "dvfs_dptc.h"
@@ -267,10 +267,10 @@ static int disable_ref_circuits(unsigned char rc_state)
}
/*!
- * This function updates the CPU voltage, produced by MC13783, by calling
- * MC13783 driver functions.
+ * This function updates the CPU voltage, produced by MC13783, by calling
+ * MC13783 driver functions.
*
- * @param dvfs_dptc_tables_ptr pointer to the DPTC translation table.
+ * @param dvfs_dptc_tables_ptr pointer to the DPTC translation table.
* @param wp current wp value.
*
*/
@@ -286,7 +286,7 @@ static void set_pmic_voltage(dvfs_dptc_tables_s * dvfs_dptc_tables_ptr, int wp)
/*!
* This function updates the DPTC threshold registers.
*
- * @param dvfs_dptc_tables_ptr pointer to the DPTC translation table.
+ * @param dvfs_dptc_tables_ptr pointer to the DPTC translation table.
* @param wp current wp value.
*
*/
@@ -306,12 +306,12 @@ static void update_dptc_thresholds(dvfs_dptc_tables_s * dvfs_dptc_tables_ptr,
}
/*!
- * This function increments a log buffer index (head or tail)
+ * This function increments a log buffer index (head or tail)
* by the value of val.
*
- * @param index pointer to the DPTC log buffer index that
+ * @param index pointer to the DPTC log buffer index that
* we wish to change.
- * @param val the value in which the index should be incremented.
+ * @param val the value in which the index should be incremented.
*
*/
static void inc_log_index(int *index, int val)
@@ -323,16 +323,16 @@ static void inc_log_index(int *index, int val)
* This function adds a new entry to the DPTC log buffer.
*
* @param dptc_log pointer to the DPTC log buffer structure.
- * @param wp value of the working point index written
+ * @param wp value of the working point index written
* to the log buffer.
*
- * @return number of log buffer entries.
+ * @return number of log buffer entries.
*
*/
static void add_dptc_log_entry(dptc_log_s * dptc_log, int wp)
{
/*
- * Down the log buffer mutex to exclude others from reading and
+ * Down the log buffer mutex to exclude others from reading and
* writing to the log buffer.
*/
if (down_interruptible(&dptc_log->mutex)) {
@@ -358,8 +358,8 @@ static void add_dptc_log_entry(dptc_log_s * dptc_log, int wp)
}
/*!
- * This function updates the drivers current working point index. This index is
- * used for access the current DTPC table entry and it corresponds to the
+ * This function updates the drivers current working point index. This index is
+ * used for access the current DTPC table entry and it corresponds to the
* current CPU working point measured by the DPTC hardware.
*
* @param new_wp New working point index value to be set.
@@ -368,7 +368,7 @@ static void add_dptc_log_entry(dptc_log_s * dptc_log, int wp)
static void set_dptc_wp(int new_wp)
{
/*
- * Check if new index is smaller than the maximal working point
+ * Check if new index is smaller than the maximal working point
* index in the DPTC translation table and larger that 0.
*/
if ((new_wp < dptc_params.dvfs_dptc_tables_ptr->wp_num)
@@ -378,13 +378,13 @@ static void set_dptc_wp(int new_wp)
}
/*
- * Check if new index is larger than the maximal working point index in
+ * Check if new index is larger than the maximal working point index in
* the DPTC translation table.
*/
if (new_wp >= dptc_params.dvfs_dptc_tables_ptr->wp_num) {
- /*
- * Set current working point index to maximal working point
- * index in the DPTC translation table.
+ /*
+ * Set current working point index to maximal working point
+ * index in the DPTC translation table.
*/
dptc_params.dvfs_dptc_tables_ptr->curr_wp =
dptc_params.dvfs_dptc_tables_ptr->wp_num - 1;
@@ -413,22 +413,22 @@ static void set_dptc_wp(int new_wp)
static void dptc_workqueue_handler(void *arg)
{
if (dptc_intr_status & 0x4) {
- /* Chip working point has increased dramatically,
+ /* Chip working point has increased dramatically,
* raise working point to maximum */
set_dptc_wp(dptc_params.dvfs_dptc_tables_ptr->curr_wp - 2);
} else if (dptc_intr_status & 0x2) {
- /* Chip working point has increased, raise working point
+ /* Chip working point has increased, raise working point
* by one */
set_dptc_wp(dptc_params.dvfs_dptc_tables_ptr->curr_wp + 1);
} else {
- /* Chip working point has decreased, lower working point
+ /* Chip working point has decreased, lower working point
* by one */
set_dptc_wp(dptc_params.dvfs_dptc_tables_ptr->curr_wp - 1);
}
/*
- * If the DPTC module is still active, re-enable
- * the DPTC hardware
+ * If the DPTC module is still active, re-enable
+ * the DPTC hardware
*/
if (dptc_params.dptc_is_active) {
dptc_enable_dptc();
@@ -438,7 +438,7 @@ static void dptc_workqueue_handler(void *arg)
/*!
* This function enables the DPTC module. this function updates the DPTC
- * thresholds, updates the MC13783, unmasks the DPTC interrupt and enables
+ * thresholds, updates the MC13783, unmasks the DPTC interrupt and enables
* the DPTC module
*
* @return 0 if DPTC module was enabled else returns -EINVAL.
@@ -452,7 +452,7 @@ static int start_dptc(void)
disable_ref_circuits(~dptc_params.rc_state);
/*
- * Set the DPTC thresholds and MC13783 voltage to
+ * Set the DPTC thresholds and MC13783 voltage to
* correspond to the current working point and frequency.
*/
set_pmic_voltage(dptc_params.dvfs_dptc_tables_ptr,
@@ -477,9 +477,9 @@ static int start_dptc(void)
}
/*!
- * This function disables the DPTC module.
+ * This function disables the DPTC module.
*
- * @return 0 if DPTC module was disabled else returns -EINVAL.
+ * @return 0 if DPTC module was disabled else returns -EINVAL.
*/
static int stop_dptc(void)
{
@@ -519,7 +519,7 @@ static void init_dptc_wp(void)
}
/*
- * Check if new index is smaller than the maximal working point
+ * Check if new index is smaller than the maximal working point
* index in the DPTC translation table and larger that 0.
*/
if ((i < dptc_params.dvfs_dptc_tables_ptr->wp_num) && (i >= 0)) {
@@ -528,13 +528,13 @@ static void init_dptc_wp(void)
}
/*
- * Check if new index is larger than the maximal working point index in
+ * Check if new index is larger than the maximal working point index in
* the DPTC translation table.
*/
if (i >= dptc_params.dvfs_dptc_tables_ptr->wp_num) {
- /*
- * Set current working point index to maximal working point
- * index in the DPTC translation table.
+ /*
+ * Set current working point index to maximal working point
+ * index in the DPTC translation table.
*/
dptc_params.dvfs_dptc_tables_ptr->curr_wp =
dptc_params.dvfs_dptc_tables_ptr->wp_num - 1;
@@ -552,7 +552,7 @@ static void init_dptc_wp(void)
*
* @param dptc_log pointer to the DPTC log buffer structure.
*
- * @return number of log buffer entries.
+ * @return number of log buffer entries.
*
*/
static int get_entry_count(dptc_log_s * dptc_log)
@@ -566,17 +566,17 @@ static int get_entry_count(dptc_log_s * dptc_log)
* and returns the data written in the log buffer.
*
* @param buf pointer to the buffer the data should be written to.
- * @param start pointer to the pointer where the new data is
+ * @param start pointer to the pointer where the new data is
* written to.
- * procedure should update the start pointer to point to
+ * procedure should update the start pointer to point to
* where in the buffer the data was written.
* @param offset current offset in the DPTC proc file.
* @param count number of bytes to read.
- * @param eof pointer to eof flag. should be set to 1 when
+ * @param eof pointer to eof flag. should be set to 1 when
* reaching eof.
* @param data driver specific data pointer.
*
- * @return number byte read from the log buffer.
+ * @return number byte read from the log buffer.
*
*/
static int read_log(char *buf, char **start, off_t offset, int count,
@@ -597,8 +597,8 @@ static int read_log(char *buf, char **start, off_t offset, int count,
num_of_entries = get_entry_count(&params->dptc_log_buffer);
/*
- * If number of entries to read is larger that the number of entries
- * in the log buffer set number of entries to read to number of
+ * If number of entries to read is larger that the number of entries
+ * in the log buffer set number of entries to read to number of
* entries in the log buffer and set eof flag to 1
*/
if (num_of_entries < entries_to_read) {
@@ -607,7 +607,7 @@ static int read_log(char *buf, char **start, off_t offset, int count,
}
/*
- * Down the log buffer mutex to exclude others from reading and
+ * Down the log buffer mutex to exclude others from reading and
* writing to the log buffer.
*/
if (down_interruptible(&params->dptc_log_buffer.mutex)) {
@@ -630,7 +630,7 @@ static int read_log(char *buf, char **start, off_t offset, int count,
memcpy(buf, entry_ptr,
(entries_to_read * sizeof(dptc_log_entry_s)));
} else {
- /*
+ /*
* Tail wrap around.
* First copy data from current position until end of buffer,
* after that copy the rest from start of the log buffer.
@@ -685,9 +685,9 @@ static int init_dptc_controller(void)
if (create_proc_read_entry(PROC_NODE_NAME, 0,
NULL, read_log, &dptc_params) == NULL) {
- /*
- * Error creating proc file system entry.
- * Exit and return error code
+ /*
+ * Error creating proc file system entry.
+ * Exit and return error code
*/
printk(KERN_ERR "DPTC: Unable create proc entry");
return -EFAULT;
@@ -1140,6 +1140,7 @@ read more than %d\n", MAX_TABLE_SIZE);
static int dptc_mx27_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
{
+ struct clk *clk;
unsigned int tmp;
int ret_val = -ENOIOCTLCMD;
char *tmp_str;
@@ -1219,7 +1220,8 @@ static int dptc_mx27_ioctl(struct inode *inode, struct file *filp,
break;
case PM_IOCGFREQ:
- ret_val = mxc_get_clocks(CPU_CLK);
+ clk = clk_get(NULL, "cpu_clk");
+ ret_val = clk_get_rate(clk);
break;
/* Unknown ioctl command -> return error */
diff --git a/drivers/mxc/pm/dvfs_dptc.c b/drivers/mxc/pm/dvfs_dptc.c
index e6b5813bdab6..608989a5446e 100644
--- a/drivers/mxc/pm/dvfs_dptc.c
+++ b/drivers/mxc/pm/dvfs_dptc.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -36,6 +36,7 @@
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/clk.h>
#include <asm/uaccess.h>
#include <linux/workqueue.h>
#include <linux/proc_fs.h>
@@ -43,7 +44,6 @@
#include <linux/jiffies.h>
#include <linux/vmalloc.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/clock.h>
#include <asm/arch/pmic_external.h>
/*
@@ -417,6 +417,7 @@ static int __init dvfs_dptc_init_default_table(void)
{
int res = 0;
char *table_str;
+ struct clk *clk;
dvfs_dptc_tables_s *default_table;
@@ -425,16 +426,19 @@ static int __init dvfs_dptc_init_default_table(void)
if (!default_table) {
return -ENOMEM;
}
+
+ table_str = default_table_str;
+ if (cpu_is_mx31()) {
+ clk = clk_get(NULL, "ckih");
+ if (clk_get_rate(clk) == 27000000) {
+ printk(KERN_INFO
+ "DVFS & DPTC: using 27MHz CKIH table\n");
#ifdef CONFIG_ARCH_MX3
- if (mxc_get_clocks(CKIH_CLK) == 27000000) {
- printk("DVFS & DPTC: using 27MHz CKIH table\n");
- table_str = default_table_str_27ckih;
- } else {
+ table_str = default_table_str_27ckih;
#endif
- table_str = default_table_str;
-#ifdef CONFIG_ARCH_MX3
+ }
+ clk_put(clk);
}
-#endif
memset(default_table, 0, sizeof(dvfs_dptc_tables_s));
res = dvfs_dptc_parse_table(default_table, table_str);
@@ -995,6 +999,7 @@ static ssize_t dvfs_dptc_read(struct file *filp, char __user * buf,
static int dvfs_dptc_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
{
+ struct clk *clk;
unsigned int tmp;
int ret_val = -ENOIOCTLCMD;
char *tmp_str;
@@ -1135,7 +1140,8 @@ static int dvfs_dptc_ioctl(struct inode *inode, struct file *filp,
break;
#endif /* CONFIG_MXC_DVFS */
case PM_IOCGFREQ:
- ret_val = mxc_get_clocks(CPU_CLK);
+ clk = clk_get(NULL, "cpu_clk");
+ ret_val = clk_get_rate(clk);
break;
/* Unknown ioctl command -> return error */
diff --git a/drivers/mxc/security/mxc_rtic.c b/drivers/mxc/security/mxc_rtic.c
index a2967cff2af7..77c1d6314ea1 100644
--- a/drivers/mxc/security/mxc_rtic.c
+++ b/drivers/mxc/security/mxc_rtic.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -26,9 +26,9 @@
*/
#include "mxc_rtic.h"
-#include <asm/arch/clock.h>
#include <linux/platform_device.h>
+#include <linux/clk.h>
#ifdef CONFIG_MXC_RTIC_TEST_DEBUG
#include <linux/module.h>
#endif /* CONFIG_MXC_RTIC_TEST_DEBUG */
@@ -44,9 +44,10 @@
void rtic_init(void)
{
-#ifdef CONFIG_ARCH_MX27
- mxc_clks_enable(RTIC_CLK);
-#endif /* CONFIG_ARCH_MX27 */
+ struct clk *clk;
+
+ clk = clk_get(NULL, "rtic_clk");
+ clk_enable(clk);
}
/*!
diff --git a/drivers/mxc/security/mxc_scc.c b/drivers/mxc/security/mxc_scc.c
index dc81b63d2f36..989a758368e1 100644
--- a/drivers/mxc/security/mxc_scc.c
+++ b/drivers/mxc/security/mxc_scc.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -49,9 +49,9 @@
*/
#include "mxc_scc_internals.h"
-#include <asm/arch/clock.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
+#include <linux/clk.h>
/******************************************************************************
*
* Global / Static Variables
@@ -75,8 +75,9 @@
* #SCC_WRITE_REGISTER macros and their ilk. All dereferences must be
* 32 bits wide.
*/
-#define static
-static volatile void *scc_base;
+//#define static
+static void *scc_base;
+static struct clk *scc_clk;
/*! Array to hold function pointers registered by
#scc_monitor_security_failure() and processed by
@@ -169,7 +170,7 @@ static int mxc_scc_suspend(struct platform_device *pdev, pm_message_t state)
#endif
/* Turn off clock */
- mxc_clks_disable(SCC_CLK);
+ clk_disable(scc_clk);
return 0;
}
@@ -189,7 +190,7 @@ static int mxc_scc_resume(struct platform_device *pdev)
#endif
/* Turn on clock */
- mxc_clks_enable(SCC_CLK);
+ clk_enable(scc_clk);
return 0;
}
@@ -240,13 +241,12 @@ static int scc_init(void)
int return_value = -EIO; /* assume error */
/* Enable the SCC clocks */
-#if defined(CONFIG_ARCH_MX27)
#ifdef SCC_DEBUG
printk(KERN_ALERT "SCC: Enabling the SCC CLK ... \n");
#endif /* SCC_DEBUG */
- mxc_clks_enable(SCC_CLK);
-#endif /* CONFIG_ARCH_MX27 */
+ scc_clk = clk_get(NULL, "scc_clk");
+ clk_enable(scc_clk);
ret = platform_driver_register(&mxc_scc_driver);
diff --git a/drivers/mxc/security/mxc_scc_internals.h b/drivers/mxc/security/mxc_scc_internals.h
index 2535c15e34e8..99e8686c4bc8 100644
--- a/drivers/mxc/security/mxc_scc_internals.h
+++ b/drivers/mxc/security/mxc_scc_internals.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -263,9 +263,6 @@ struct scc_key_slot {
uint32_t status; /**< 0 = unassigned, 1 = assigned. */
};
-/*! Calculated once for quick reference to max address in SCM */
-extern uint32_t scm_highest_memory_address;
-
/* Forward-declare a number routines which are not part of user api */
static int scc_init(void);
static void scc_cleanup(void);
diff --git a/drivers/mxc/security/sahara2/include/linux_port.h b/drivers/mxc/security/sahara2/include/linux_port.h
index be8d33debfcd..2d26c9504ee9 100644
--- a/drivers/mxc/security/sahara2/include/linux_port.h
+++ b/drivers/mxc/security/sahara2/include/linux_port.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -70,7 +70,7 @@
#include <linux/platform_device.h> /* used in dynamic power management */
-#include <asm/arch/clock.h> /* clock en/disable for DPM */
+#include <linux/clk.h> /* clock en/disable for DPM */
#include <linux/dmapool.h>
#include <linux/dma-mapping.h>
diff --git a/drivers/mxc/security/sahara2/sah_driver_interface.c b/drivers/mxc/security/sahara2/sah_driver_interface.c
index 133a62a4a786..a430cc472043 100644
--- a/drivers/mxc/security/sahara2/sah_driver_interface.c
+++ b/drivers/mxc/security/sahara2/sah_driver_interface.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -156,6 +156,7 @@ static char Diag_msg[DIAG_MSG_SIZE];
*/
OS_DEV_INIT(sah_init)
{
+ struct clk *clk;
/* Status variable */
int os_error_code = 0;
#ifdef DIAG_DRV_IF
@@ -168,7 +169,8 @@ OS_DEV_INIT(sah_init)
#ifdef DIAG_DRV_IF
LOG_KDIAG("SAHARA : Enabling the IPG and AHB clocks\n")
#endif /*DIAG_DRV_IF */
- mxc_clks_enable(SAHARA2_CLK);
+ clk = clk_get(NULL, "sahara_clk");
+ clk_enable(clk);
if (os_error_code == 0) {
sah_hw_version = sah_HW_Read_Version();
@@ -322,6 +324,7 @@ OS_DEV_SHUTDOWN(sah_cleanup)
#if defined(CONFIG_DEVFS_FS) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
devfs_unregister(Sahara_devfs_handle);
#else
+ struct clk *clk;
int ret_val = 0;
if (Sahara_procfs_handle != NULL) {
@@ -355,7 +358,8 @@ OS_DEV_SHUTDOWN(sah_cleanup)
#ifdef DIAG_DRV_IF
LOG_KDIAG("SAHARA : Disabling the clocks\n")
#endif /*DIAG_DRV_IF */
- mxc_clks_disable(SAHARA2_CLK);
+ clk = clk_get(NULL, "sahara_clk");
+ clk_disable(clk);
os_dev_shutdown_return(OS_ERROR_OK_S);
}
diff --git a/drivers/mxc/ssi/ssi.c b/drivers/mxc/ssi/ssi.c
index 30057f94cc33..4ff58c963bed 100644
--- a/drivers/mxc/ssi/ssi.c
+++ b/drivers/mxc/ssi/ssi.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -24,7 +24,6 @@
#include <linux/init.h>
#include <linux/slab.h>
#include <asm/uaccess.h>
-#include <asm/arch/clock.h>
#include "registers.h"
#include "ssi.h"
diff --git a/drivers/mxc/vpu/mxc_vpu.c b/drivers/mxc/vpu/mxc_vpu.c
index fa91f01b8ac5..3a3172bdb2c4 100644
--- a/drivers/mxc/vpu/mxc_vpu.c
+++ b/drivers/mxc/vpu/mxc_vpu.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -34,6 +34,7 @@
#include <linux/dma-mapping.h>
#include <linux/wait.h>
#include <linux/list.h>
+#include <linux/clk.h>
#include <asm/uaccess.h>
#include <asm/io.h>
@@ -41,7 +42,6 @@
#include <asm/dma-mapping.h>
#include <asm/hardware.h>
-#include <asm/arch/clock.h>
#include <asm/arch/mxc_vpu.h>
#define BIT_INT_CLEAR 0x00C
@@ -65,6 +65,7 @@ static int vpu_major = 0;
static struct class *vpu_class;
static struct vpu vpu_data;
static u8 open_count = 0;
+static struct clk *vpu_clk;
/* implement the blocking ioctl */
static int codec_done = 0;
@@ -119,7 +120,7 @@ static irqreturn_t vpu_irq_handler(int irq, void *dev_id)
*/
static int vpu_hardware_enable(void)
{
- mxc_clks_enable(VPU_BAUD);
+ clk_enable(vpu_clk);
/* enable user space access for vpu register */
__raw_writel(0x1, IO_ADDRESS(AIPI_BASE_ADDR + 0x20008));
return 0;
@@ -132,7 +133,7 @@ static int vpu_hardware_enable(void)
*/
static int vpu_hardware_disable(void)
{
- mxc_clks_disable(VPU_BAUD);
+ clk_disable(vpu_clk);
__raw_writel(0xffffffff, IO_ADDRESS(AIPI_BASE_ADDR + 0x20008));
return 0;
@@ -384,6 +385,8 @@ static int vpu_dev_probe(struct platform_device *pdev)
goto err_out_class;
}
+ vpu_clk = clk_get(&pdev->dev, "vpu_clk");
+
request_irq(INT_VPU, vpu_irq_handler, 0, "VPU_CODEC_IRQ",
(void *)(&vpu_data));
@@ -432,6 +435,8 @@ static void __exit vpu_exit(void)
vpu_major = 0;
}
+ clk_put(vpu_clk);
+
platform_driver_unregister(&mxcvpu_driver);
return;
}
diff --git a/drivers/net/fec.c b/drivers/net/fec.c
index 772b4cabb67a..976473575bbe 100644
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -25,7 +25,7 @@
* Copyright (c) 2004-2006 Macq Electronique SA.
*/
/*
- * Copyright 2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#include <linux/module.h>
@@ -45,6 +45,7 @@
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/bitops.h>
+#include <linux/clk.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
@@ -60,7 +61,6 @@
#define FEC_ALIGNMENT (0x03) /*FEC needs 4bytes alignment*/
#elif defined(CONFIG_ARCH_MXC)
#include <asm/arch/hardware.h>
-#include <asm/arch/clock.h>
#include <asm/arch/iim.h>
#include "fec.h"
#define FEC_ALIGNMENT (0x0F) /*FEC needs 128bits(32bytes) alignment*/
@@ -247,6 +247,8 @@ struct fec_enet_private {
int link;
int old_link;
int full_duplex;
+
+ struct clk *clk;
};
static int fec_enet_open(struct net_device *dev);
@@ -2017,8 +2019,11 @@ extern void gpio_fec_inactive(void);
*/
static void __inline__ fec_arch_init(void)
{
+ struct clk *clk;
gpio_fec_active();
- mxc_clks_enable(FEC_CLK);
+ clk = clk_get(NULL, "fec_clk");
+ clk_enable(clk);
+ clk_put(clk);
return;
}
/*
@@ -2026,7 +2031,10 @@ static void __inline__ fec_arch_init(void)
*/
static void __inline__ fec_arch_exit(void)
{
- mxc_clks_disable(FEC_CLK);
+ struct clk *clk;
+ clk = clk_get(NULL, "fec_clk");
+ clk_disable(clk);
+ clk_put(clk);
gpio_fec_inactive();
return;
}
@@ -2057,6 +2065,8 @@ static void __inline__ fec_release_intrs(struct net_device *dev)
static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep)
{
+ u32 rate;
+ struct clk *clk;
volatile fec_t *fecp;
fecp = fep->hwp;
fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;
@@ -2065,8 +2075,12 @@ static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_priva
/*
* Set MII speed to 2.5 MHz
*/
+ clk = clk_get(NULL, "fec_clk");
+ rate = clk_get_rate(clk);
+ clk_put(clk);
+
fep->phy_speed =
- ((((mxc_get_clocks(AHB_CLK) / 2 + 4999999) / 2500000) / 2) & 0x3F) << 1;
+ ((((rate / 2 + 4999999) / 2500000) / 2) & 0x3F) << 1;
fecp->fec_mii_speed = fep->phy_speed;
fec_restart(dev, 0);
}
diff --git a/drivers/net/irda/mxc_ir.c b/drivers/net/irda/mxc_ir.c
index ffbc13218aac..cfc7a65b9592 100644
--- a/drivers/net/irda/mxc_ir.c
+++ b/drivers/net/irda/mxc_ir.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -36,6 +36,7 @@
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
+#include <linux/clk.h>
#include <net/irda/irda.h>
#include <net/irda/wrapper.h>
@@ -45,7 +46,6 @@
#include <asm/dma.h>
#include <asm/hardware.h>
#include <asm/arch/mxc_uart.h>
-#include <asm/arch/clock.h>
#include "mxc_ir.h"
#define IS_SIR(mi) ( (mi)->speed <= 115200 )
@@ -174,7 +174,17 @@ struct mxc_irda {
/*!
* UART clock needed for baud rate calculations
*/
- unsigned int uartclk;
+ struct clk *uart_clk;
+
+ /*!
+ * UART clock needed for baud rate calculations
+ */
+ unsigned long uart_clk_rate;
+
+ /*!
+ * FIRI clock needed for baud rate calculations
+ */
+ struct clk *firi_clk;
/*!
* FIRI IRQ number.
@@ -216,9 +226,6 @@ struct mxc_irda {
extern void gpio_firi_active(void *, unsigned int);
extern void gpio_firi_inactive(void);
extern void gpio_firi_init(void);
-extern unsigned int firi_get_clocks(void);
-extern void firi_disable_uart_clock(void);
-extern void firi_enable_uart_clock(void);
void mxc_irda_firi_init(struct mxc_irda *si);
#ifdef FIRI_SDMA_RX
@@ -338,8 +345,8 @@ static int mxc_irda_set_speed(struct mxc_irda *si, int speed)
gpio_firi_inactive();
num = baud / 100 - 1;
- denom = si->uartclk / 1600 - 1;
- if ((denom < 65536) && (si->uartclk > 1600)) {
+ denom = si->uart_clk_rate / 1600 - 1;
+ if ((denom < 65536) && (si->uart_clk_rate > 1600)) {
writel(num, si->uart_base + MXC_UARTUBIR);
writel(denom, si->uart_base + MXC_UARTUBMR);
}
@@ -383,7 +390,7 @@ static int mxc_irda_set_speed(struct mxc_irda *si, int speed)
writel(cr, si->firi_base + FIRITCR);
gpio_firi_active(si->firi_base + FIRITCR, FIRITCR_TPP);
-
+
si->speed = speed;
cr = readl(si->firi_base + FIRIRCR);
@@ -1053,8 +1060,14 @@ void mxc_irda_firi_init(struct mxc_irda *si)
unsigned int firi_baud, osf = 6;
unsigned int tcr, rcr, cr;
- firi_baud = mxc_get_clocks(FIRI_BAUD);
- mxc_clks_enable(FIRI_BAUD);
+ si->firi_clk = clk_get(si->dev, "firi_clk");
+ firi_baud = clk_round_rate(si->firi_clk, 48004500);
+ if ((firi_baud < 47995500) ||
+ (clk_set_rate(si->firi_clk, firi_baud) < 0)) {
+ dev_err(si->dev, "Unable to set FIR clock to 48MHz.\n");
+ return;
+ }
+ clk_enable(si->firi_clk);
writel(0xFFFF, si->firi_base + FIRITSR);
writel(0xFFFF, si->firi_base + FIRIRSR);
@@ -1115,7 +1128,7 @@ static int mxc_irda_uart_init(struct mxc_irda *si)
/* Configure the IOMUX for the UART */
gpio_firi_init();
- per_clk = firi_get_clocks();
+ per_clk = clk_get_rate(si->uart_clk);
baud = per_clk / 16;
if (baud > MAX_UART_BAUDRATE) {
baud = MAX_UART_BAUDRATE;
@@ -1124,8 +1137,10 @@ static int mxc_irda_uart_init(struct mxc_irda *si)
d = 6;
}
}
- si->uartclk = per_clk / d;
- writel(si->uartclk / 1000, si->uart_base + MXC_UARTONEMS);
+ clk_enable(si->uart_clk);
+
+ si->uart_clk_rate = per_clk / d;
+ writel(si->uart_clk_rate / 1000, si->uart_base + MXC_UARTONEMS);
writel(MXC_IRDA_RX_INV | MXC_UARTUCR4_IRSC,
si->uart_base + MXC_UARTUCR4);
@@ -1155,9 +1170,9 @@ static int mxc_irda_uart_init(struct mxc_irda *si)
baud = 9600;
num = baud / 100 - 1;
- denom = si->uartclk / 1600 - 1;
+ denom = si->uart_clk_rate / 1600 - 1;
- if ((denom < 65536) && (si->uartclk > 1600)) {
+ if ((denom < 65536) && (si->uart_clk_rate > 1600)) {
writel(num, si->uart_base + MXC_UARTUBIR);
writel(denom, si->uart_base + MXC_UARTUBMR);
}
@@ -1469,7 +1484,7 @@ static int mxc_irda_suspend(struct platform_device *pdev, pm_message_t state)
cr = readl(si->uart_base + MXC_UARTUCR1);
cr &= ~MXC_UARTUCR1_UARTEN;
writel(cr, si->uart_base + MXC_UARTUCR1);
- firi_disable_uart_clock();
+ clk_disable(si->uart_clk);
/*Disable Tx and Rx for FIRI and then disable the FIRI clock.. */
cr = readl(si->firi_base + FIRITCR);
@@ -1478,7 +1493,7 @@ static int mxc_irda_suspend(struct platform_device *pdev, pm_message_t state)
cr = readl(si->firi_base + FIRIRCR);
cr &= ~FIRIRCR_RE;
writel(cr, si->firi_base + FIRIRCR);
- mxc_clks_disable(FIRI_BAUD);
+ clk_disable(si->firi_clk);
gpio_firi_inactive();
@@ -1511,7 +1526,7 @@ static int mxc_irda_resume(struct platform_device *pdev)
if (si->suspend == 1 && !si->open) {
/*Initialise the UART first */
- firi_enable_uart_clock();
+ clk_enable(si->uart_clk);
/*Now init FIRI */
gpio_firi_active(si->firi_base + FIRITCR, FIRITCR_TPP);
@@ -1612,6 +1627,7 @@ static int mxc_irda_probe(struct platform_device *pdev)
si->dev = &pdev->dev;
si->mxc_ir_plat = pdev->dev.platform_data;
+ si->uart_clk = si->mxc_ir_plat->uart_clk;
si->uart_res = uart_res;
si->firi_res = firi_res;
diff --git a/drivers/pcmcia/mx31ads-pcmcia.c b/drivers/pcmcia/mx31ads-pcmcia.c
index 12c8c3c8ef93..fbe2be60770a 100644
--- a/drivers/pcmcia/mx31ads-pcmcia.c
+++ b/drivers/pcmcia/mx31ads-pcmcia.c
@@ -1,7 +1,7 @@
/*======================================================================
drivers/pcmcia/mx31ads-pcmica.c
- Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
Device driver for the PCMCIA control functionality of i.Mx31
microprocessors.
@@ -36,13 +36,13 @@
#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/clk.h>
#include <pcmcia/version.h>
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
#include <pcmcia/ss.h>
#include <asm/mach-types.h>
-#include <asm/arch/clock.h>
#include <asm/arch/pcmcia.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
@@ -842,15 +842,13 @@ mx31ads_common_pcmcia_get_timing(struct mx31ads_pcmcia_socket *skt,
calc_speed(skt->spd_attr, MAX_WIN, PCMCIA_ATTR_MEM_ACCESS);
}
-extern unsigned long mxc_get_clocks(enum mxc_clocks clk);
-
static int mx31ads_pcmcia_set_timing(struct mx31ads_pcmcia_socket *skt)
{
u_int clk_ns;
struct mx31ads_pcmcia_timing timing;
/* How many nanoseconds */
- clk_ns = (1000 * 1000 * 1000) / mxc_get_clocks(AHB_CLK);
+ clk_ns = (1000 * 1000 * 1000) / clk_get_rate(skt->clk);
pr_debug(KERN_INFO "clk_ns = %d\n", clk_ns);
mx31ads_common_pcmcia_get_timing(skt, &timing);
@@ -1072,6 +1070,8 @@ static int mx31ads_common_drv_pcmcia_probe(struct platform_device *pdev,
skt->dev = &pdev->dev;
skt->ops = ops;
+ skt->clk = clk_get(NULL, "pcmcia_clk");
+
skt->res_skt.start = _PCMCIA(0);
skt->res_skt.end = _PCMCIA(0) + PCMCIASp - 1;
skt->res_skt.name = MX31ADS_PCMCIA;
diff --git a/drivers/pcmcia/mx31ads-pcmcia.h b/drivers/pcmcia/mx31ads-pcmcia.h
index 5d9550ba935b..616f6771d563 100644
--- a/drivers/pcmcia/mx31ads-pcmcia.h
+++ b/drivers/pcmcia/mx31ads-pcmcia.h
@@ -1,7 +1,7 @@
/*
* linux/drivers/pcmcia/mx31ads-pcmcia.h
*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This file contains definitions for the PCMCIA support code common to
* integrated SOCs like the i.Mx31 microprocessors.
@@ -38,6 +38,8 @@ struct mx31ads_pcmcia_socket {
unsigned int nr;
unsigned int irq;
+ struct clk *clk;
+
/*
* Core PCMCIA state
*/
diff --git a/drivers/serial/mxc_uart.c b/drivers/serial/mxc_uart.c
index 2d9f0c40c29a..151c131e9079 100644
--- a/drivers/serial/mxc_uart.c
+++ b/drivers/serial/mxc_uart.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -34,6 +34,7 @@
#include <linux/platform_device.h>
#include <linux/sysrq.h>
#include <linux/dma-mapping.h>
+#include <linux/clk.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/dma.h>
@@ -1275,7 +1276,7 @@ static void mxcuart_set_termios(struct uart_port *port,
cr2_mask = ~(MXC_UARTUCR2_IRTS | MXC_UARTUCR2_CTSC | MXC_UARTUCR2_PREN |
MXC_UARTUCR2_PROE | MXC_UARTUCR2_STPB | MXC_UARTUCR2_WS);
- per_clk = mxc_get_clocks(umxc->clock_id);
+ per_clk = clk_get_rate(umxc->clk);
mxcuart_get_maxbaud(per_clk, &max_baud);
/*
@@ -1510,9 +1511,9 @@ mxcuart_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
uart_mxc_port *umxc = (uart_mxc_port *) port;
if (state)
- mxc_clks_disable(umxc->clock_id);
+ clk_disable(umxc->clk);
else
- mxc_clks_enable(umxc->clock_id);
+ clk_enable(umxc->clk);
}
/*!
@@ -1792,7 +1793,7 @@ static int mxcuart_resume(struct platform_device *pdev)
* information that is used by the suspend, resume and remove
* functions
*
- * @return The function always returns 0.
+ * @return The function returns 0 if successful; -1 otherwise.
*/
static int mxcuart_probe(struct platform_device *pdev)
{
@@ -1809,6 +1810,11 @@ static int mxcuart_probe(struct platform_device *pdev)
if (mxc_ports[id]->dma_enabled == 1) {
mxc_ports[id]->port.flags |= UPF_LOW_LATENCY;
}
+
+ mxc_ports[id]->clk = clk_get(&pdev->dev, "uart_clk");
+ if (mxc_ports[id]->clk == NULL)
+ return -1;
+
uart_add_one_port(&mxc_reg, &mxc_ports[id]->port);
platform_set_drvdata(pdev, mxc_ports[id]);
pdev->dev.power.can_wakeup = 1;
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 73f1d894567a..b878652f0af4 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -28,6 +28,7 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/types.h>
+#include <linux/clk.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
@@ -36,7 +37,6 @@
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/arch/gpio.h>
-#include <asm/arch/clock.h>
#ifdef CONFIG_ARCH_MX27
#include "mxc_spi_mx27.h"
@@ -194,7 +194,7 @@ struct mxc_spi {
/*!
* CSPI Clock id.
*/
- enum mxc_clocks clock_id;
+ struct clk *clk;
/*!
* CSPI input clock SCLK.
*/
@@ -576,13 +576,12 @@ static int mxc_spi_probe(struct platform_device *pdev)
/* Set this master's data from platform_info */
- master->bus_num = mxc_platform_info->bus_num;
+ master->bus_num = pdev->id + 1;
master->num_chipselect = mxc_platform_info->maxchipselect;
/* Set the master controller driver data for this master */
master_drv_data = spi_master_get_devdata(master);
- master_drv_data->clock_id = mxc_platform_info->clock;
master_drv_data->mxc_bitbang.master = spi_master_get(master);
/* Set the master bitbang data */
@@ -663,10 +662,9 @@ static int mxc_spi_probe(struct platform_device *pdev)
/* Enable the CSPI Clock, CSPI Module, set as a master */
- mxc_clks_enable(master_drv_data->clock_id);
-
- master_drv_data->spi_ipg_clk =
- mxc_get_clocks(master_drv_data->clock_id);
+ master_drv_data->clk = clk_get(&pdev->dev, "cspi_clk");
+ clk_enable(master_drv_data->clk);
+ master_drv_data->spi_ipg_clk = clk_get_rate(master_drv_data->clk);
__raw_writel(MXC_CSPICTRL_ENABLE | MXC_CSPICTRL_MASTER,
master_drv_data->base + MXC_CSPICTRL);
@@ -702,7 +700,8 @@ static int mxc_spi_probe(struct platform_device *pdev)
err2:
gpio_spi_inactive(master->bus_num - 1);
- mxc_clks_disable(master_drv_data->clock_id);
+ clk_disable(master_drv_data->clk);
+ clk_put(master_drv_data->clk);
free_irq(master_drv_data->irq, master_drv_data);
err1:
release_mem_region(pdev->resource[0].start,
@@ -732,7 +731,7 @@ static int mxc_spi_remove(struct platform_device *pdev)
spi_master_get_devdata(master);
gpio_spi_inactive(master->bus_num - 1);
- mxc_clks_disable(master_drv_data->clock_id);
+ clk_disable(master_drv_data->clk);
/* Disable the CSPI module */
@@ -832,7 +831,7 @@ static int mxc_spi_suspend(struct platform_device *pdev, pm_message_t state)
__raw_writel(MXC_CSPICTRL_DISABLE,
master_drv_data->base + MXC_CSPICTRL);
- mxc_clks_disable(master_drv_data->clock_id);
+ clk_disable(master_drv_data->clk);
gpio_spi_inactive(master->bus_num - 1);
return ret;
@@ -852,7 +851,7 @@ static int mxc_spi_resume(struct platform_device *pdev)
struct mxc_spi *master_drv_data = spi_master_get_devdata(master);
gpio_spi_active(master->bus_num - 1);
- mxc_clks_enable(master_drv_data->clock_id);
+ clk_enable(master_drv_data->clk);
spi_bitbang_resume(&master_drv_data->mxc_bitbang);
__raw_writel(MXC_CSPICTRL_ENABLE | MXC_CSPICTRL_MASTER,
diff --git a/drivers/video/mxc/mx2fb.c b/drivers/video/mxc/mx2fb.c
index 471622baed1f..422185a12d09 100644
--- a/drivers/video/mxc/mx2fb.c
+++ b/drivers/video/mxc/mx2fb.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -33,8 +33,8 @@
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
+#include <linux/clk.h>
#include <asm/uaccess.h>
-#include <asm/arch/clock.h>
#include <asm/arch/mxcfb.h>
#include "mx2fb.h"
@@ -51,7 +51,7 @@ static int fb_enabled = 0;
static unsigned long default_bpp = 16;
static unsigned char brightness = 255;
static ATOMIC_NOTIFIER_HEAD(mx2fb_notifier_list);
-
+static struct clk *lcdc_clk;
/*!
* @brief Structure containing the MX2 specific framebuffer information.
*/
@@ -845,7 +845,7 @@ static void _enable_lcdc(struct fb_info *info)
if (mx2fbi->type == MX2FB_TYPE_GW)
_enable_graphic_window(info);
else if (!fb_enabled) {
- mxc_clks_enable(LCDC_CLK);
+ clk_enable(lcdc_clk);
gpio_lcdc_active();
board_power_lcd(1);
_set_brightness(brightness);
@@ -882,7 +882,7 @@ static void _disable_lcdc(struct fb_info *info)
gpio_lcdc_inactive();
board_power_lcd(0);
_set_brightness(0);
- mxc_clks_disable(LCDC_CLK);
+ clk_disable(lcdc_clk);
fb_enabled = 0;
}
#ifdef CONFIG_FB_MXC_TVOUT
@@ -1050,11 +1050,15 @@ static void _update_lcdc(struct fb_info *info)
__raw_writel(info->var.xres_virtual >> 1, LCDC_REG(LCDC_LVPWR));
/* To setup LCDC pixel clock */
- mxc_set_clocks_div(LCDC_CLK, 1);
+ perclk3 = clk_round_rate(lcdc_clk, 133000000);
+ if (clk_set_rate(lcdc_clk, perclk3)) {
+ printk(KERN_INFO "mx2fb: Unable to set clock to %lu\n",
+ perclk3);
+ perclk3 = clk_get_rate(lcdc_clk);
+ }
/* Calculate pixel clock divider, and round to the nearest integer */
- perclk3 = mxc_get_clocks(PERCLK3);
- pcd = (perclk3 * 10 / (PICOS2KHZ(var->pixclock) * 1000UL) + 5) / 10;
+ pcd = (perclk3 * 8 / (PICOS2KHZ(var->pixclock) * 1000UL) + 4) / 8;
if (--pcd > 0x3F)
pcd = 0x3F;
@@ -1265,6 +1269,8 @@ static int mx2fb_probe(struct platform_device *pdev)
{
int ret, i;
+ lcdc_clk = clk_get(&pdev->dev, "lcdc_clk");
+
for (i = 0; i < sizeof(mx2fb_info) / sizeof(struct fb_info); i++) {
if ((ret = _install_fb(&mx2fb_info[i], pdev))) {
dev_err(&pdev->dev,
diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index f913a4cc799e..3753ba1851c7 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2006 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -43,9 +43,9 @@
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/clk.h>
#include <asm/hardware.h>
#include <asm/setup.h>
-#include <asm/arch/clock.h>
#include "../w1.h"
#include "../w1_int.h"
@@ -90,6 +90,7 @@ struct mxc_w1_device {
char *base_address;
unsigned long found;
unsigned int clkdiv;
+ struct clk *clk;
struct w1_bus_master *bus_master;
};
@@ -164,7 +165,7 @@ static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
*/
static void mxc_w1_hw_init(struct mxc_w1_device *dev)
{
- mxc_clks_enable(OWIRE_CLK);
+ clk_enable(dev->clk);
/* set the timer divider clock to divide by 65 */
/* as the clock to the One Wire is at 66.5MHz */
@@ -173,11 +174,6 @@ static void mxc_w1_hw_init(struct mxc_w1_device *dev)
return;
}
-static int mxc_w1_getdiv(void)
-{
- return ((mxc_get_clocks(OWIRE_CLK) / 1000000) - 1);
-}
-
/*!
* this is the probe routine for the One Wire driver.
* It is called during the driver initilaization.
@@ -191,17 +187,17 @@ static int __devinit mxc_w1_probe(struct platform_device *pdev)
struct mxc_w1_device *dev;
int err = 0;
- dev = kmalloc(sizeof(struct mxc_w1_device) +
+ dev = kzalloc(sizeof(struct mxc_w1_device) +
sizeof(struct w1_bus_master), GFP_KERNEL);
if (!dev) {
return -ENOMEM;
}
- memset(dev, 0,
- sizeof(struct mxc_w1_device) + sizeof(struct w1_bus_master));
+ dev->clk = clk_get(&pdev->dev, "owire_clk");
+
dev->bus_master = (struct w1_bus_master *)(dev + 1);
dev->found = 1;
- dev->clkdiv = mxc_w1_getdiv();
+ dev->clkdiv = (clk_get_rate(dev->clk) / 1000000) - 1;
dev->base_address = (void *)IO_ADDRESS(OWIRE_BASE_ADDR);
mxc_w1_hw_init(dev);
@@ -232,6 +228,7 @@ static int mxc_w1_remove(struct platform_device *pdev)
{
struct mxc_w1_device *dev = platform_get_drvdata(pdev);
+ clk_put(dev->clk);
if (dev->found) {
w1_remove_master_device(dev->bus_master);
}