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authorHenry Lin <henryl@nvidia.com>2013-10-29 15:53:54 +0800
committerHarry Hong <hhong@nvidia.com>2014-01-13 16:31:18 -0800
commit05536b463ba44cbe75a9002d34162d49b0009cf0 (patch)
tree2314c3f3ebf9e07b083c12762dc89fdfc1878406 /drivers
parentac4193a64d2a45b56e38d5bdfce0b129628fb22a (diff)
xhci: tegra: Reset EMC bandwidth before elpg
xhci fw informs driver the changes to maximum bandwidth requirement by MBOX_CMD_SET_BW mailbox command. Driver should reset the required bandwidth to 0 before going to elpg. Bug 1371282 Change-Id: Ic7cdd4d95335a02bce6b017d9d5af101bd4b1365 Signed-off-by: Henry Lin <henryl@nvidia.com> Reviewed-on: http://git-master/r/304734 (cherry picked from commit f21d0ee5e1cadd578ad962df02f90a38adf16369) Signed-off-by: Henry Lin <henryl@nvidia.com> Reviewed-on: http://git-master/r/354846 Reviewed-by: Harry Hong <hhong@nvidia.com> Tested-by: Harry Hong <hhong@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/host/xhci-tegra.c17
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index 816cca927913..2b75dcfc6040 100644
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -1443,6 +1443,14 @@ static void utmip_biaspd_workaround(struct tegra_xhci_hcd *tegra)
}
}
+static void tegra_xusb_set_bw(struct tegra_xhci_hcd *tegra, unsigned int bw)
+{
+ unsigned int freq_khz;
+
+ freq_khz = tegra_emc_bw_to_freq_req(bw);
+ clk_set_rate(tegra->emc_clk, freq_khz * 1000);
+}
+
static void tegra_xhci_save_dfe_ctle_context(struct tegra_xhci_hcd *tegra,
u8 port)
{
@@ -2055,6 +2063,9 @@ static int tegra_xhci_ss_elpg_entry(struct tegra_xhci_hcd *tegra)
must_have_sync_lock(tegra);
+ /* update maximum BW requirement to 0 */
+ tegra_xusb_set_bw(tegra, 0);
+
/* This is SS partition ELPG entry
* STEP 0: firmware will set WOC WOD bits in PVTPORTSC2 regs.
*/
@@ -2583,7 +2594,6 @@ tegra_xhci_process_mbox_message(struct work_struct *work)
struct tegra_xhci_hcd *tegra = container_of(work, struct tegra_xhci_hcd,
mbox_work);
struct xhci_hcd *xhci = tegra->xhci;
- unsigned int freq_khz;
mutex_lock(&tegra->mbox_lock);
@@ -2633,8 +2643,9 @@ tegra_xhci_process_mbox_message(struct work_struct *work)
goto send_sw_response;
case MBOX_CMD_SET_BW:
/* fw sends BW request in MByte/sec */
- freq_khz = tegra_emc_bw_to_freq_req(tegra->cmd_data << 10);
- clk_set_rate(tegra->emc_clk, freq_khz * 1000);
+ mutex_lock(&tegra->sync_lock);
+ tegra_xusb_set_bw(tegra, tegra->cmd_data << 10);
+ mutex_unlock(&tegra->sync_lock);
/* clear MBOX_SMI_INT_EN bit */
cmd = readl(tegra->fpci_base + XUSB_CFG_ARU_MBOX_CMD);