diff options
author | Stefan Agner <stefan@agner.ch> | 2014-03-05 23:11:08 +0100 |
---|---|---|
committer | Shawn Guo <shawn.guo@freescale.com> | 2014-04-19 13:20:41 +0800 |
commit | f1d29ccf7157e5c5e2443339de582ac604b1c826 (patch) | |
tree | ae40bdd0c4f4a0a24a67150224a4ab4b64771b16 /drivers | |
parent | c9ebe60d3dc649fc07b05809af500a1d0c108c6c (diff) |
clocksource: vf_pit_timer: use complement for sched_clock reading
commit 224aa3ed45c8735ae02bb2ecca002409fa6aa772 upstream.
Vybrids PIT register is monitonic decreasing. However, sched_clock
reading needs to be monitonic increasing. Use bitwise not to get
the complement of the clock register. This fixes the clock going
backward. Also, the clock now starts at 0 since we load the
register with the maximum value at start.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: daniel.lezcano@linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Link: http://lkml.kernel.org/r/d25af915993aec1b486be653eb86f748ddef54fe.1394057313.git.stefan@agner.ch
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/clocksource/vf_pit_timer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clocksource/vf_pit_timer.c b/drivers/clocksource/vf_pit_timer.c index 598399d57fc5..01cb26fb0fc6 100644 --- a/drivers/clocksource/vf_pit_timer.c +++ b/drivers/clocksource/vf_pit_timer.c @@ -54,7 +54,7 @@ static inline void pit_irq_acknowledge(void) static unsigned int pit_read_sched_clock(void) { - return __raw_readl(clksrc_base + PITCVAL); + return ~__raw_readl(clksrc_base + PITCVAL); } static int __init pit_clocksource_init(unsigned long rate) |