diff options
| author | Tony Lindgren <tony@atomide.com> | 2005-11-10 14:26:53 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-11-10 14:26:53 +0000 |
| commit | 9ad5897c2659b3c610e0c717e8b3dbfb496d2c74 (patch) | |
| tree | e3c54fd65813d0bea79e42b32cf8bfaf60643e1d /include/asm-arm/arch-omap/sram.h | |
| parent | 046d6b28ebce92aab2865aa3eb3a0d8ede57e17e (diff) | |
[ARM] 3143/1: OMAP 4/5: Update omap include files
Patch from Tony Lindgren
This patch syncs the mainline kernel with linux-omap tree.
This patch contains changes to common header files for
omap1xxx and omap24xx by various omap developers, and
improved cpu detection by Imre Deak
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-omap/sram.h')
| -rw-r--r-- | include/asm-arm/arch-omap/sram.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/include/asm-arm/arch-omap/sram.h b/include/asm-arm/arch-omap/sram.h new file mode 100644 index 000000000000..e72ccbf0fe06 --- /dev/null +++ b/include/asm-arm/arch-omap/sram.h @@ -0,0 +1,38 @@ +/* + * linux/include/asm-arm/arch-omap/sram.h + * + * Interface for functions that need to be run in internal SRAM + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_OMAP_SRAM_H +#define __ARCH_ARM_OMAP_SRAM_H + +extern void * omap_sram_push(void * start, unsigned long size); +extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); + +extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); +extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type); +extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); + + +/* Do not use these */ +extern void sram_reprogram_clock(u32 ckctl, u32 dpllctl); +extern unsigned long sram_reprogram_clock_sz; + +extern void sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); +extern unsigned long sram_ddr_init_sz; + +extern u32 sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); +extern unsigned long sram_set_prcm_sz; + +extern void sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type); +extern unsigned long sram_reprogram_sdrc_sz; + +#endif |