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authorHyok S. Choi <hyok.choi@samsung.com>2006-09-26 17:38:32 +0900
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-27 17:39:19 +0100
commitf37f46eb1c0bd0b11c34ef06c7365658be989d80 (patch)
tree1790995456cafc852899927140e5dd7523463fdb /include/asm-arm/cacheflush.h
parentd60674eb5d961b2421db16cc373dc163f38cc105 (diff)
[ARM] nommu: add ARM946E-S core support
This patch adds ARM946E-S core support which has typically 8KB I&D cache. It has a MPU and supports ARMv5TE instruction set. Because the ARM946E-S core can be synthesizable with various cache size, CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/cacheflush.h')
-rw-r--r--include/asm-arm/cacheflush.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index b0a8603400be..b611a8ea0bb2 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -64,6 +64,14 @@
# endif
#endif
+#if defined(CONFIG_CPU_ARM946E)
+# ifdef _CACHE
+# define MULTI_CACHE 1
+# else
+# define _CACHE arm946
+# endif
+#endif
+
#if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100)
# ifdef _CACHE
# define MULTI_CACHE 1