diff options
| author | Bryan Wu <cooloney@kernel.org> | 2008-07-15 12:08:50 +0800 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2008-07-15 12:08:50 +0800 |
| commit | 1c0d20cd29aec11a3580cedf0bccec25052e8d4c (patch) | |
| tree | 7a6d6a59956a79066c7d000c82f211b69f23847c /include/asm-blackfin/mach-bf527/anomaly.h | |
| parent | c71b47835188d0c2a1e1f9590564f1b71c651710 (diff) | |
Blackfin arch: add TXDWA definition to enable new feature
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf527/anomaly.h')
| -rw-r--r-- | include/asm-blackfin/mach-bf527/anomaly.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/include/asm-blackfin/mach-bf527/anomaly.h index 4725268a5ada..b7b166f4f064 100644 --- a/include/asm-blackfin/mach-bf527/anomaly.h +++ b/include/asm-blackfin/mach-bf527/anomaly.h @@ -23,6 +23,8 @@ #define ANOMALY_05000245 (1) /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ #define ANOMALY_05000265 (1) +/* New Feature: EMAC TX DMA Word Alignment */ +#define ANOMALY_05000285 (1) /* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ #define ANOMALY_05000312 (1) /* Incorrect Access of OTP_STATUS During otp_write() Function */ |