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authorMike Frysinger <vapier.adi@gmail.com>2008-04-24 05:03:26 +0800
committerBryan Wu <cooloney@kernel.org>2008-04-24 05:03:26 +0800
commit5d1617b247aa63698618215a9f39ecf905d55779 (patch)
tree63629a804f6be1d9950725a86f9e67dd5328da6a /include/asm-blackfin
parentf950f605b9cd0e4bb53b902d2b2edbbb3e6079fc (diff)
[Blackfin] arch: merge ip0x-specific board changes
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r--include/asm-blackfin/mach-bf533/mem_init.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/include/asm-blackfin/mach-bf533/mem_init.h b/include/asm-blackfin/mach-bf533/mem_init.h
index 1620dae5254d..f8f31901fca9 100644
--- a/include/asm-blackfin/mach-bf533/mem_init.h
+++ b/include/asm-blackfin/mach-bf533/mem_init.h
@@ -29,7 +29,8 @@
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#if (CONFIG_MEM_MT48LC16M16A2TG_75 || CONFIG_MEM_MT48LC64M4A2FB_7E || CONFIG_MEM_GENERIC_BOARD)
+#if (CONFIG_MEM_MT48LC16M16A2TG_75 || CONFIG_MEM_MT48LC64M4A2FB_7E || \
+ CONFIG_MEM_MT48LC32M16A2TG_75 || CONFIG_MEM_GENERIC_BOARD)
#if (CONFIG_SCLK_HZ > 119402985)
#define SDRAM_tRP TRP_2
#define SDRAM_tRP_num 2
@@ -118,6 +119,13 @@
#define SDRAM_CL CL_3
#endif
+#if (CONFIG_MEM_MT48LC32M16A2TG_75)
+ /*SDRAM INFORMATION: */
+#define SDRAM_Tref 64 /* Refresh period in milliseconds */
+#define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */
+#define SDRAM_CL CL_3
+#endif
+
#if (CONFIG_MEM_GENERIC_BOARD)
/*SDRAM INFORMATION: Modify this for your board */
#define SDRAM_Tref 64 /* Refresh period in milliseconds */