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authorIngo Molnar <mingo@elte.hu>2008-06-25 12:36:55 +0200
committerIngo Molnar <mingo@elte.hu>2008-06-25 12:36:55 +0200
commitf6477cc76c73833a56e97f1fafc36a7ca92927e5 (patch)
tree9b4ca3d9fa63ea001d516834c8b2707094f3f711 /include/asm-mips/cpu-info.h
parentfd2c17e1777d46cff14c25ea774a4d17459d188a (diff)
parent543cf4cb3fe6f6cae3651ba918b9c56200b257d0 (diff)
Merge branch 'linus' into x86/timerstip-x86-timers-2008-06-25_10.37_Wed
Diffstat (limited to 'include/asm-mips/cpu-info.h')
-rw-r--r--include/asm-mips/cpu-info.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 0c5a358863f3..2de73dbb2e9e 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -56,7 +56,7 @@ struct cpuinfo_mips {
struct cache_desc tcache; /* Tertiary/split secondary cache */
int srsets; /* Shadow register sets */
int core; /* physical core number */
-#if defined(CONFIG_MIPS_MT_SMTC)
+#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
/*
* In the MIPS MT "SMTC" model, each TC is considered
* to be a "CPU" for the purposes of scheduling, but
@@ -64,7 +64,7 @@ struct cpuinfo_mips {
* to all TCs within the same VPE.
*/
int vpe_id; /* Virtual Processor number */
-#endif /* CONFIG_MIPS_MT */
+#endif
#ifdef CONFIG_MIPS_MT_SMTC
int tc_id; /* Thread Context number */
#endif