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authorRalf Baechle <ralf@linux-mips.org>2005-02-10 12:19:59 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:30:31 +0100
commitc6e8b587718c486b55c2ebecc6de231a30beba35 (patch)
tree7c6162d449c69fb6425bd27ba341e2d874fb0a1b /include/asm-mips/page.h
parent57f0060b8a2bb2a70a4cce1a37d5e0158cea92a6 (diff)
Update MIPS to use the 4-level pagetable code thereby getting rid of
the compacrapability headers. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/page.h')
-rw-r--r--include/asm-mips/page.h42
1 files changed, 34 insertions, 8 deletions
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 652b6d67a571..ee25a779bf49 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -87,22 +87,48 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
typedef struct { unsigned long pte; } pte_t;
#define pte_val(x) ((x).pte)
#endif
+#define __pte(x) ((pte_t) { (x) } )
-typedef struct { unsigned long pmd; } pmd_t;
-typedef struct { unsigned long pgd; } pgd_t;
-typedef struct { unsigned long pgprot; } pgprot_t;
+/*
+ * For 3-level pagetables we defines these ourselves, for 2-level the
+ * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
+ */
+#ifdef CONFIG_64BIT
+typedef struct { unsigned long pmd; } pmd_t;
#define pmd_val(x) ((x).pmd)
-#define pgd_val(x) ((x).pgd)
-#define pgprot_val(x) ((x).pgprot)
+#define __pmd(x) ((pmd_t) { (x) } )
-#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
+#endif
-#define __pte(x) ((pte_t) { (x) } )
-#define __pmd(x) ((pmd_t) { (x) } )
+/*
+ * Right now we don't support 4-level pagetables, so all pud-related
+ * definitions come from <asm-generic/pgtable-nopud.h>.
+ */
+
+/*
+ * Finall the top of the hierarchy, the pgd
+ */
+typedef struct { unsigned long pgd; } pgd_t;
+#define pgd_val(x) ((x).pgd)
#define __pgd(x) ((pgd_t) { (x) } )
+
+/*
+ * Manipulate page protection bits
+ */
+typedef struct { unsigned long pgprot; } pgprot_t;
+#define pgprot_val(x) ((x).pgprot)
#define __pgprot(x) ((pgprot_t) { (x) } )
+/*
+ * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd
+ * pair of pages we only have a single global bit per pair of pages. When
+ * writing to the TLB make sure we always have the bit set for both pages
+ * or none. This macro is used to access the `buddy' of the pte we're just
+ * working on.
+ */
+#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
+
#endif /* !__ASSEMBLY__ */
/* to align the pointer to the (next) page boundary */