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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-16 10:44:35 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-16 10:44:35 -0700
commitebc283118ee448dcb6e6cae74a8a43f17a1ccc3f (patch)
treedaeb82c70de678ac10a5cec153097294dd772cb1 /include/asm-mips/pmc-sierra/msp71xx/war.h
parentfc8a327db6c46de783b1a4276d846841b9abc24c (diff)
parent8bb00d83d8fc2de5c0614f5d55780107e0c375fe (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Increase cp0 compare clockevent min_delta_ns from 0x30 to 0x300. [MIPS] Cache: Provide more information on cache policy on bootup. [MIPS] Fix aliasing bug in copy_user_highpage, take 2. [MIPS] VPE loader: convert from struct class_ device to struct device [MIPS] MIPSsim: Fix booting from NFS root [MIPS] Alchemy: Get rid of au1xxx_irq_map_t. [MIPS] Alchemy: Get rid of au_ffz(). [MIPS] Alchemy: Get rid of au_ffs(). [MIPS] Alchemy: cleanup interrupt code. [MIPS] Lasat: Fix build by conversion to irq_cpu.c. [MIPS] Lasat: Add #ifndef ... #endif include warpper to lasatint.h. [MIPS] IP22: Enable -Werror. [MIPS] IP22: Fix warning. [MIPS] IP22: Complain if requesting the front panel irq failed. [MIPS] vmlinux.lds.S: Handle KPROBES_TEXT. [MIPS] vmlinux.lds.S: Fix handling of .notes in final link. [MIPS] vmlinux.lds.S: Remove duplicate comment. [MIPS] MSP71XX: Add workarounds file. [MIPS] IP32: Fix build by conversion to irq_cpu.c.
Diffstat (limited to 'include/asm-mips/pmc-sierra/msp71xx/war.h')
-rw-r--r--include/asm-mips/pmc-sierra/msp71xx/war.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/include/asm-mips/pmc-sierra/msp71xx/war.h b/include/asm-mips/pmc-sierra/msp71xx/war.h
new file mode 100644
index 000000000000..0bf48fc1892b
--- /dev/null
+++ b/include/asm-mips/pmc-sierra/msp71xx/war.h
@@ -0,0 +1,28 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_PMC_SIERRA_WAR_H
+#define __ASM_MIPS_PMC_SIERRA_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#define R4600_V1_HIT_CACHEOP_WAR 0
+#define R4600_V2_HIT_CACHEOP_WAR 0
+#define R5432_CP0_INTERRUPT_WAR 0
+#define BCM1250_M3_WAR 0
+#define SIBYTE_1956_WAR 0
+#define MIPS4K_ICACHE_REFILL_WAR 0
+#define MIPS_CACHE_SYNC_WAR 0
+#define TX49XX_ICACHE_INDEX_INV_WAR 0
+#define RM9000_CDEX_SMP_WAR 0
+#define ICACHE_REFILLS_WORKAROUND_WAR 0
+#define R10000_LLSC_WAR 0
+#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \
+ defined(CONFIG_PMC_MSP7120_FPGA)
+#define MIPS34K_MISSED_ITLB_WAR 1
+#endif
+
+#endif /* __ASM_MIPS_PMC_SIERRA_WAR_H */