diff options
author | Justin Waters <justin.waters@timesys.com> | 2008-02-26 13:07:02 -0500 |
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committer | Justin Waters <justin.waters@timesys.com> | 2008-02-26 13:07:02 -0500 |
commit | b80a32b9cc634adfa8eaef33ec981e7febf2ade2 (patch) | |
tree | f256bce13ba11f514a388160df84e1410bedbe2b /include/asm-mips/smtc.h | |
parent | 594133ef22fae0d737bd1b57352cf3f48a192c63 (diff) |
Update the i.MX31 Kernel to 2.6.232.6.23-mx31ads-2008022618072.6.23-mx31-200802261807
This is the result of a brute-force attempt to update the kernel to 2.6.23.
Now that we have a git tree, our effort will be a little nicer in the future.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Diffstat (limited to 'include/asm-mips/smtc.h')
-rw-r--r-- | include/asm-mips/smtc.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-mips/smtc.h b/include/asm-mips/smtc.h index 44dfa4adecf3..ff3e8936b493 100644 --- a/include/asm-mips/smtc.h +++ b/include/asm-mips/smtc.h @@ -55,4 +55,14 @@ extern void smtc_boot_secondary(int cpu, struct task_struct *t); #define PARKED_INDEX ((unsigned int)0x80000000) +/* + * Define low-level interrupt mask for IPIs, if necessary. + * By default, use SW interrupt 1, which requires no external + * hardware support, but which works only for single-core + * MIPS MT systems. + */ +#ifndef MIPS_CPU_IPI_IRQ +#define MIPS_CPU_IPI_IRQ 1 +#endif + #endif /* _ASM_SMTC_MT_H */ |