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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2006-06-13 13:59:01 +0200
committerRalf Baechle <ralf@linux-mips.org>2006-06-19 17:39:24 +0100
commit4a0312fca6599299bbed944ce09278d90388a3e5 (patch)
treecde9b9d353eab1aa7ab062c2a958986bd45c1f24 /include/asm-mips/sni.h
parentb00f473e1af9a11454e572de1ea446eb672e700d (diff)
[MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors.
Added support for RM200C machines with big endian firmware Added support for RM200-C40 (R5000 support) Signed-off-by: Florian Lohoff <flo@rfc822.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/sni.h')
-rw-r--r--include/asm-mips/sni.h7
1 files changed, 2 insertions, 5 deletions
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h
index b3bc698dfdee..b9ba54d0dd35 100644
--- a/include/asm-mips/sni.h
+++ b/include/asm-mips/sni.h
@@ -15,9 +15,6 @@
/*
* ASIC PCI registers for little endian configuration.
*/
-#ifndef __MIPSEL__
-#error "Fix me for big endian"
-#endif
#define PCIMT_UCONF 0xbfff0000
#define PCIMT_IOADTIMEOUT2 0xbfff0008
#define PCIMT_IOMEMCONF 0xbfff0010
@@ -51,9 +48,9 @@
#define PCIMT_PCI_CONF 0xbfff0100
/*
- * Data port for the PCI bus.
+ * Data port for the PCI bus in IO space
*/
-#define PCIMT_CONFIG_DATA 0xb4000cfc
+#define PCIMT_CONFIG_DATA 0x0cfc
/*
* Board specific registers