diff options
author | Jin Park <jinyoungp@nvidia.com> | 2011-08-02 16:35:58 +0900 |
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committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:48:04 -0800 |
commit | 6c795c895781e5c57125e9329683ffccd7d3e3a7 (patch) | |
tree | 52a530400f403cde377377d2471a0f1ae266ed6c /include/linux/regulator | |
parent | 39307618427a53088522133def1b8de603f9cd76 (diff) |
regulator: max77663: Add MAX77663 regulator driver
Add regulator driver for Maxim PMU MAX77663.
Bug 849360
Bug 854414
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Original-Change-Id: I740f484ee1f39deefa8e5b9669426d6e6bafb42d
Reviewed-on: http://git-master/r/44484
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Re303620c5dcae6f56d1f219484d659525005eaa7
Diffstat (limited to 'include/linux/regulator')
-rw-r--r-- | include/linux/regulator/max77663-regulator.h | 110 |
1 files changed, 110 insertions, 0 deletions
diff --git a/include/linux/regulator/max77663-regulator.h b/include/linux/regulator/max77663-regulator.h new file mode 100644 index 000000000000..8cf8c5852538 --- /dev/null +++ b/include/linux/regulator/max77663-regulator.h @@ -0,0 +1,110 @@ +/* + * include/linux/regulator/max77663-regulator.h + * Maxim LDO and Buck regulators driver + * + * Copyright 2011 Maxim Integrated Products, Inc. + * Copyright (C) 2011 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + */ + +#ifndef __LINUX_REGULATOR_MAX77663_REGULATOR_H__ +#define __LINUX_REGULATOR_MAX77663_REGULATOR_H__ + +#include <linux/regulator/machine.h> + +#define max77663_rails(_name) "max77663_"#_name + +enum max77663_regulator_id { + MAX77663_REGULATOR_ID_SD0, + MAX77663_REGULATOR_ID_DVSSD0, + MAX77663_REGULATOR_ID_SD1, + MAX77663_REGULATOR_ID_DVSSD1, + MAX77663_REGULATOR_ID_SD2, + MAX77663_REGULATOR_ID_SD3, + MAX77663_REGULATOR_ID_SD4, + MAX77663_REGULATOR_ID_LDO0, + MAX77663_REGULATOR_ID_LDO1, + MAX77663_REGULATOR_ID_LDO2, + MAX77663_REGULATOR_ID_LDO3, + MAX77663_REGULATOR_ID_LDO4, + MAX77663_REGULATOR_ID_LDO5, + MAX77663_REGULATOR_ID_LDO6, + MAX77663_REGULATOR_ID_LDO7, + MAX77663_REGULATOR_ID_LDO8, + MAX77663_REGULATOR_ID_NR, +}; + +/* FPS Power Up/Down Period */ +enum max77663_regulator_fps_power_period { + FPS_POWER_PERIOD_0, + FPS_POWER_PERIOD_1, + FPS_POWER_PERIOD_2, + FPS_POWER_PERIOD_3, + FPS_POWER_PERIOD_4, + FPS_POWER_PERIOD_5, + FPS_POWER_PERIOD_6, + FPS_POWER_PERIOD_7, + FPS_POWER_PERIOD_DEF = -1, +}; + +/* FPS Time Period */ +enum max77663_regulator_fps_time_period { + FPS_TIME_PERIOD_20US, + FPS_TIME_PERIOD_40US, + FPS_TIME_PERIOD_80US, + FPS_TIME_PERIOD_160US, + FPS_TIME_PERIOD_320US, + FPS_TIME_PERIOD_640US, + FPS_TIME_PERIOD_1280US, + FPS_TIME_PERIOD_2560US, + FPS_TIME_PERIOD_DEF = -1, +}; + +/* FPS Enable Source */ +enum max77663_regulator_fps_en_src { + FPS_EN_SRC_EN0, + FPS_EN_SRC_EN1, + FPS_EN_SRC_SW, + FPS_EN_SRC_RSVD, +}; + +/* FPS Source */ +enum max77663_regulator_fps_src { + FPS_SRC_0, + FPS_SRC_1, + FPS_SRC_2, + FPS_SRC_NONE, + FPS_SRC_DEF = -1, +}; + +/* + * Flags + */ +/* SD0 is controlled by EN2 input. */ +#define EN2_CTRL_SD0 0x01 + +struct max77663_regulator_fps_cfg { + int en_src; + int time_period; +}; + +struct max77663_regulator_platform_data { + struct regulator_init_data init_data; + bool init_apply; + bool init_enable; + int init_uV; + + int fps_src; + int fps_pu_period; + int fps_pd_period; + struct max77663_regulator_fps_cfg *fps_cfg; + + unsigned int flags; +}; + +#endif /* __LINUX_REGULATOR_MAX77663_REGULATOR_H__ */ |