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authorTerje Bergstrom <tbergstrom@nvidia.com>2011-11-24 12:32:58 +0200
committerVarun Wadekar <vwadekar@nvidia.com>2011-12-08 17:55:25 +0530
commitc0d4b78b3abe5b7a5db7f870eb762b9e0fe2693f (patch)
treed646b00dddd480539ecd732328d8abe0fa54743e /include/trace
parentf8539561c2f789682e29f34365c164a5ef9a2bc3 (diff)
video: tegra: host: Support for right shift on reloc patches
Some hardware architectures require that only select MSB bits be supplied to them for addresses. They do the reverse transformation while accessing the actual memory. Bug 857531 Change-Id: I215f099ff0ee86daff1c1eb1e5b70edf8ae856d9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/66654 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Shashank Garg <sgarg@nvidia.com>
Diffstat (limited to 'include/trace')
-rw-r--r--include/trace/events/nvhost.h12
1 files changed, 5 insertions, 7 deletions
diff --git a/include/trace/events/nvhost.h b/include/trace/events/nvhost.h
index a0184440a09c..6c266b9f2ea4 100644
--- a/include/trace/events/nvhost.h
+++ b/include/trace/events/nvhost.h
@@ -172,23 +172,21 @@ TRACE_EVENT(nvhost_channel_write_cmdbuf_data,
__entry->cmdbuf ? __entry->words * 4 : 0))
);
-TRACE_EVENT(nvhost_channel_write_relocs,
- TP_PROTO(const char *name, u32 relocs),
+TRACE_EVENT(nvhost_channel_write_reloc,
+ TP_PROTO(const char *name),
- TP_ARGS(name, relocs),
+ TP_ARGS(name),
TP_STRUCT__entry(
__field(const char *, name)
- __field(u32, relocs)
),
TP_fast_assign(
__entry->name = name;
- __entry->relocs = relocs;
),
- TP_printk("name=%s, relocs=%u",
- __entry->name, __entry->relocs)
+ TP_printk("name=%s",
+ __entry->name)
);
TRACE_EVENT(nvhost_channel_write_waitchks,