diff options
author | Quinn Jensen <quinn.jensen@freescale.com> | 2007-10-24 21:17:16 -0600 |
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committer | Quinn Jensen <quinn.jensen@freescale.com> | 2007-10-24 21:17:16 -0600 |
commit | c71cbf8d5b51090c103fe85f0f306823278853d1 (patch) | |
tree | 9e96cecdda6f11e201b0cd75fd20e87aee03eddd /include | |
parent | ea2b7e75d21a9c89fd599aa61033efc8f1cd1b0e (diff) |
This patch adds MX-specific drivers to the linux 2.6.22 kernel
for MX platforms. Drivers include: Digital Audio Mux (DAM),
MPEG4, Image Processing Unit (IPU), Power Management, SSI, and
VPU (Video Processing Unit) drivers.
http://www.bitshrine.org/gpp/linux-2.6.22-mx-drivers_mxc.patch
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/fsl_devices.h | 43 |
1 files changed, 32 insertions, 11 deletions
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index 73710d617775..a6814f02ead6 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h @@ -71,8 +71,8 @@ struct gianfar_mdio_data { #define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080 /* Flags in gianfar_platform_data */ -#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */ -#define FSL_GIANFAR_BRD_IS_REDUCED 0x00000002 /* Set if RGMII, RMII */ +#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */ +#define FSL_GIANFAR_BRD_IS_REDUCED 0x00000002 /* Set if RGMII, RMII */ struct fsl_i2c_platform_data { /* device specific information */ @@ -100,9 +100,30 @@ enum fsl_usb2_phy_modes { struct fsl_usb2_platform_data { /* board specific information */ - enum fsl_usb2_operating_modes operating_mode; - enum fsl_usb2_phy_modes phy_mode; - unsigned int port_enables; + enum fsl_usb2_operating_modes operating_mode; + enum fsl_usb2_phy_modes phy_mode; + unsigned int port_enables; + + /* DDD this could arguably be moved to a separate + * fsl usb2 device header file + */ + char *name; /* pretty print */ + int (*platform_init) (struct platform_device *); + void (*platform_uninit) (struct fsl_usb2_platform_data *); + int (*platform_verify) (struct platform_device *); + u32 xcvr_type; /* PORTSC_PTS_* */ + char *transceiver; /* transceiver name */ + // DDD combine usbmode and view into 1 register-base variable + u32 usbmode; /* address of usbmode register */ + u32 viewport; /* address of ulpiview register */ + u32 r_start; /* start of MEM resource */ + u32 r_len; /* length of MEM resource */ + void __iomem *regs; /* ioremap'd register base */ + int does_otg; + unsigned power_budget; /* for hcd->power_budget */ + struct fsl_xcvr_ops *xcvr_ops; + int (*gpio_usb_active) (void); + void (*gpio_usb_inactive) (void); }; /* Flags in fsl_usb2_mph_platform_data */ @@ -110,14 +131,14 @@ struct fsl_usb2_platform_data { #define FSL_USB2_PORT1_ENABLED 0x00000002 struct fsl_spi_platform_data { - u32 initial_spmode; /* initial SPMODE value */ - u16 bus_num; + u32 initial_spmode; /* initial SPMODE value */ + u16 bus_num; /* board specific information */ - u16 max_chipselect; - void (*activate_cs)(u8 cs, u8 polarity); - void (*deactivate_cs)(u8 cs, u8 polarity); - u32 sysclk; + u16 max_chipselect; + void (*activate_cs) (u8 cs, u8 polarity); + void (*deactivate_cs) (u8 cs, u8 polarity); + u32 sysclk; }; #endif /* _FSL_DEVICE_H_ */ |