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authorIgor Nabirushkin <inabirushkin@nvidia.com>2014-03-13 13:09:17 +0400
committerSimone Willett <swillett@nvidia.com>2014-04-23 10:38:53 -0700
commit22076e5260b49b6f3f38ac1c22e5c755de56ae7f (patch)
tree886bec062c288032a18a3244583bb6cb9e08cbce /include
parent82a0e92bd2e066d09e27cbcdc12d3fe276dfaca6 (diff)
misc: tegra-profiler: support special mappings
Tegra Profiler: support special architecture mappings Bug 1480667 Change-Id: I2f1bd67d99888d39bc713a5c58d295b121ad18b2 Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com> Reviewed-on: http://git-master/r/381407 (cherry picked from commit 75aeabcf32fb9967f74d046445a830cc606da59d) Reviewed-on: http://git-master/r/398037 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Tested-by: Maxim Morin <mmorin@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/tegra_profiler.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/include/linux/tegra_profiler.h b/include/linux/tegra_profiler.h
index d56cf0f288eb..ef5b7f1494c3 100644
--- a/include/linux/tegra_profiler.h
+++ b/include/linux/tegra_profiler.h
@@ -19,7 +19,7 @@
#include <linux/ioctl.h>
-#define QUADD_SAMPLES_VERSION 23
+#define QUADD_SAMPLES_VERSION 24
#define QUADD_IO_VERSION 10
#define QUADD_IO_VERSION_DYNAMIC_RB 5
@@ -34,6 +34,7 @@
#define QUADD_SAMPLE_VERSION_THREAD_STATE_FLD 19
#define QUADD_SAMPLE_VERSION_BT_UNWIND_TABLES 22
#define QUADD_SAMPLE_VERSION_SUPPORT_IP64 23
+#define QUADD_SAMPLE_VERSION_SPECIAL_MMAP 24
#define QUADD_MAX_COUNTERS 32
#define QUADD_MAX_PROCESS 64
@@ -180,6 +181,8 @@ struct quadd_sample_data {
u32 events_flags;
};
+#define QUADD_MMAP_ED_IS_FILE_EXISTS (1 << 0)
+
struct quadd_mmap_data {
u32 pid;
@@ -340,6 +343,8 @@ enum {
#define QUADD_COMM_CAP_EXTRA_GET_MMAP (1 << 1)
#define QUADD_COMM_CAP_EXTRA_GROUP_SAMPLES (1 << 2)
#define QUADD_COMM_CAP_EXTRA_BT_UNWIND_TABLES (1 << 3)
+#define QUADD_COMM_CAP_EXTRA_SUPPORT_AARCH64 (1 << 4)
+#define QUADD_COMM_CAP_EXTRA_SPECIAL_ARCH_MMAP (1 << 5)
struct quadd_comm_cap {
u32 pmu:1,