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authorPhilipp Zabel <philipp.zabel@gmail.com>2007-01-02 20:59:38 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-01-02 23:42:03 +0000
commitf566b2b22d89c4785f25e6e4d60163b5ae6251f4 (patch)
tree714efeca8cef7240e97dcc37db85fad3369b87d3 /include
parent8e140362f71ed801c69c5df63a68fc2cd07da3a9 (diff)
[ARM] 4080/1: Fix for the SSCR0_SlotsPerFrm macro
The SSCR0_SlotsPerFrm macro writes a 3-bit value to bits [2:0], while the correct location of FRDC in SSCR0 is at bits [26:24]. This patch adds the missing "<< 24". Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 083e03c5639f..f8f34505f470 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1626,7 +1626,7 @@
#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */
#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */
#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */
-#define SSCR0_SlotsPerFrm(x) ((x) - 1) /* Time slots per frame [1..8] */
+#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */
#define SSCR0_ADC (1 << 30) /* Audio clock select */
#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */
#endif