diff options
author | Joerg Roedel <joerg.roedel@amd.com> | 2011-12-01 12:04:58 +0100 |
---|---|---|
committer | Hiroshi DOYU <hdoyu@nvidia.com> | 2012-01-23 11:11:41 +0200 |
commit | 85cbac345ddd3d591e1b42ad95381efbf22340d4 (patch) | |
tree | 244d03d58b8fce99fed4d0bd518bd9c6ecacbdb9 /include | |
parent | 7fcd6778bd5fbed23e1883968f82ad55e8030291 (diff) |
iommu/amd: Add device errata handling
Add infrastructure for errata-handling and handle two known
erratas in the IOMMUv2 code.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/amd-iommu.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h index a6863a2dec1f..4152c3073db4 100644 --- a/include/linux/amd-iommu.h +++ b/include/linux/amd-iommu.h @@ -26,6 +26,24 @@ extern int amd_iommu_detect(void); + +/** + * amd_iommu_enable_device_erratum() - Enable erratum workaround for device + * in the IOMMUv2 driver + * @pdev: The PCI device the workaround is necessary for + * @erratum: The erratum workaround to enable + * + * Possible values for the erratum number are for now: + * - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI + * is enabled + * - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI + * requests to one + */ +#define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0 +#define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1 + +extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum); + #else static inline int amd_iommu_detect(void) { return -ENODEV; } |