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authorLuwei Zhou <b45643@freescale.com>2015-05-18 14:53:07 +0800
committerLuwei Zhou <b45643@freescale.com>2015-05-18 14:53:07 +0800
commit71754e1cec000d2ff8ccc09b99fb1b18e53c7f73 (patch)
tree3c36691ffb472142f3c7412d02afd87a6bb26b36 /include
parent17d1315b0704e2db63ee6bd7aaefa0c796f53104 (diff)
MLK-10913-2: ARM: imx: Add the SIM clock support on i.MX6UL.
Set the usb_otg_pll as the pareent of clks[IMX6UL_CLK_SIM_PRE_SEL].The RM is wrong in description of 6~9 bit of CCM_CCGR6. These are used as clock gate of SIM1 and SIM2. Update the clock tree code. Signed-off-by: Luwei Zhou <b45643@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/clock/imx6ul-clock.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/dt-bindings/clock/imx6ul-clock.h b/include/dt-bindings/clock/imx6ul-clock.h
index cc53b670f325..fbf6ad20f911 100644
--- a/include/dt-bindings/clock/imx6ul-clock.h
+++ b/include/dt-bindings/clock/imx6ul-clock.h
@@ -225,8 +225,8 @@
#define IMX6UL_CLK_AXI 212
#define IMX6UL_CLK_SPDIF_GCLK 213
#define IMX6UL_CLK_GPT_3M 214
-#define IMX6UL_CLK_GPMI 215
-#define IMX6UL_CLK_BCH 216
+#define IMX6UL_CLK_SIM2 215
+#define IMX6UL_CLK_SIM1 216
#define IMX6UL_CLK_IPP_DI0 217
#define IMX6UL_CLK_IPP_DI1 218
#define IMX6UL_CA7_SECONDARY_SEL 219