serial: tegra: Support for best clock source

Finding the best clock source for uart controller which can
generate the clock rate having minimum error between requested
baudrate and configured baudrate.

bug 842665

Change-Id: I9a750f578f7dfd7ea2138fdf1bcec30b0f3392d5
Reviewed-on: http://git-master/r/38426
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/include/linux/tegra_uart.h b/include/linux/tegra_uart.h
index 435b4198e4be..3d35e217cbca 100644
--- a/include/linux/tegra_uart.h
+++ b/include/linux/tegra_uart.h
@@ -20,8 +20,18 @@
 #ifndef _TEGRA_UART_H_
 #define _TEGRA_UART_H_
 
+#include <linux/clk.h>
+
+struct uart_clk_parent {
+	const char	*name;
+	struct clk	*parent_clk;
+	unsigned long	fixed_clk_rate;
+};
+
 struct tegra_uart_platform_data {
 	void (*wake_peer)(struct uart_port *);
+	struct uart_clk_parent *parent_clk_list;
+	int parent_clk_count;
 };
 
 int tegra_uart_is_tx_empty(struct uart_port *);