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authorLinus Torvalds <torvalds@linux-foundation.org>2014-05-07 15:45:13 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-05-07 15:45:13 -0700
commit8a207d3e84535e9de14cee59bcf0ea3ede61aca8 (patch)
tree3b07e950dfc4cd0bbd285b90a3d2d18cdda32bba /include
parent38583f095c5a8138ae2a1c9173d0fd8a9f10e8aa (diff)
parent2a1235e53bed8fa111e1c1ee2e7d8d91efa71ebc (diff)
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie: "radeon, i915 and nouveau fixes, all fixes for regressions or black screens, or possible oopses" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/radeon: lower the ref * post PLL maximum drm/radeon: check that we have a clock before PLL setup drm/radeon: drm/radeon: add missing radeon_semaphore_free to error path drm/radeon: Fix num_banks calculation for SI agp: info leak in agpioc_info_wrap() drm/gm107/gr: bump attrib cb size quite a bit drm/nouveau: fix another lock unbalance in nouveau_crtc_page_flip drm/nouveau/bios: fix shadowing from PROM on big-endian systems drm/nouveau/acpi: allow non-optimus setups to load vbios from acpi drm/radeon/dp: check for errors in dpcd reads drm/radeon: avoid high jitter with small frac divs drm/radeon: check buffer relocation offset drm/radeon: use pflip irq on R600+ v2 drm/radeon/uvd: use lower clocks on old UVD to boot v2 drm/i915: don't try DP_LINK_BW_5_4 on HSW ULX drm/i915: Sanitize the enable_ppgtt module option once drm/i915: Break encoder->crtc link separately in intel_sanitize_crtc()
Diffstat (limited to 'include')
-rw-r--r--include/drm/i915_pciids.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 940ece4934ba..012d58fa8ff0 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -191,8 +191,8 @@
INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \
INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
- INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \
- INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \
+ INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \
+ INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \
INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \
INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \
INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \