input: touch: raydium: Update to Raydium v55 driver.

Bug 1257642
Bug 1245549
Bug 1245404

Change-Id: I83614e33307cb2545c3a85be4a44c86e2afc1005
Signed-off-by: Robert Collins <rcollins@nvidia.com>
Reviewed-on: http://git-master/r/218645
Reviewed-by: Xiaohui Tao <xtao@nvidia.com>
Tested-by: Xiaohui Tao <xtao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matt Wagner <mwagner@nvidia.com>

2 files changed, 172 insertions, 169 deletions

diff --git a/include/linux/spi/rm31080a_ctrl.h b/include/linux/spi/rm31080a_ctrl.h
index 61987aabf8af..2f47cfd04f2a 100644
--- a/include/linux/spi/rm31080a_ctrl.h
+++ b/include/linux/spi/rm31080a_ctrl.h
@@ -1,22 +1,22 @@
 #ifndef _RM31080A_CTRL_H_
 #define _RM31080A_CTRL_H_
 
-#define RM31080_REG_01 0x01
-#define RM31080_REG_02 0x02
-#define RM31080_REG_09 0x09
-#define RM31080_REG_0E 0x0E
-#define RM31080_REG_10 0x10
-#define RM31080_REG_11 0x11
-#define RM31080_REG_1F 0x1F
-#define RM31080_REG_2F 0x2F
-#define RM31080_REG_40 0x40
-#define RM31080_REG_41 0x41
-#define RM31080_REG_42 0x42
-#define RM31080_REG_43 0x43
-#define RM31080_REG_80 0x80
-#define RM31080_REG_F2 0xF2
-#define RM31080_REG_7E 0x7E
-#define RM31080_REG_7F 0x7F
+#define RM31080_REG_01	0x01
+#define RM31080_REG_02	0x02
+#define RM31080_REG_09	0x09
+#define RM31080_REG_0E	0x0E
+#define RM31080_REG_10	0x10
+#define RM31080_REG_11	0x11
+#define RM31080_REG_1F	0x1F
+#define RM31080_REG_2F	0x2F
+#define RM31080_REG_40	0x40
+#define RM31080_REG_41	0x41
+#define RM31080_REG_42	0x42
+#define RM31080_REG_43	0x43
+#define RM31080_REG_80	0x80
+#define RM31080_REG_F2	0xF2
+#define RM31080_REG_7E	0x7E
+#define RM31080_REG_7F	0x7F
 
 #define RM31080B1_REG_BANK0_00H		0x00
 #define RM31080B1_REG_BANK0_01H		0x01
@@ -26,87 +26,72 @@
 #define RM31080B1_REG_BANK0_0EH		0x0E
 #define RM31080B1_REG_BANK0_11H		0x11
 
+typedef enum {
+    ND_NORMAL = 0,
+    ND_DETECTOR_OFF,
+    ND_BASELINE_NOT_READY,
+    ND_NOISE_DETECTED,
+    ND_LEAVE_NOISE_MODE
+} NOISE_DETECTOR_RET_t;
 
-/* Tchreg.h */
-/* Adaptive digital filter */
-#define ADFC                                       0x10
-#define FILTER_THRESHOLD_MODE                      0x08
-#define FILTER_NONTHRESHOLD_MODE                   0x00
+/*Tchreg.h*/
+#define ADFC						0x10	/* Adaptive digital filter*/
+#define FILTER_THRESHOLD_MODE		0x08
+#define FILTER_NONTHRESHOLD_MODE	0x00
 
-#define REPEAT_5                                   0x04
-#define REPEAT_4                                   0x03
-#define REPEAT_3                                   0x02
-#define REPEAT_2                                   0x01
-#define REPEAT_1                                   0x00
+#define REPEAT_5			0x04
+#define REPEAT_4			0x03
+#define REPEAT_3			0x02
+#define REPEAT_2			0x01
+#define REPEAT_1			0x00
 
 struct rm31080a_ctrl_para {
 
 	unsigned short u16DataLength;
+	unsigned short bICVersion;
 	unsigned short bChannelNumberX;
 	unsigned short bChannelNumberY;
 	unsigned short bADCNumber;
 	unsigned char bfNoiseMode;
 	unsigned char bNoiseRepeatTimes;
-	unsigned char bfNoiseDetector;
 
 	unsigned short u16ResolutionX;
 	unsigned short u16ResolutionY;
 
-	unsigned char bICVersion;
 
-	/* Marty added */
-	unsigned char bChannelDetectorNum;	/* Noise_Detector */
-	unsigned char bChannelDetectorDummy;	/* Noise_Detector */
-	signed char bNoiseThresholdMax;	/* Noise_Detector */
-	signed char bNoiseThresholdMin;	/* Noise_Detector */
-	signed char bNoiseThresholdLowMax;	/* Noise_Detector */
-	signed char bNoiseThresholdLowMin;	/* Noise_Detector */
-	unsigned char bBaselineReady;	/* Noise_Detector */
-	unsigned char bNoiseDetectThd;	/* Noise_Detector */
-	unsigned char bNewNoiseRepeatTimes;
-	unsigned char bRepeatTimes[2];	/* Noise_Detector */
+	unsigned char bChannelDetectorNum;
+	unsigned char bChannelDetectorDummy;
+	unsigned char bActiveRepeatTimes[2];	/* Noise_Detector */
 	unsigned char bIdleRepeatTimes[2];
 	unsigned char bSenseNumber;	/* Noise_Detector */
 	unsigned char bfADFC;	/* Noise_Detector */
 	unsigned char bfTHMode;	/* Noise_Detector */
 	unsigned char bfAnalogFilter;	/* Noise_Detector */
-	unsigned char bXChannel[4];
-	unsigned char bYChannel[2];
-	unsigned char bDummyChannel[4];
 	unsigned char bfNoiseModeDetector;
-	unsigned char bfMediumFilter;
-	unsigned char bMFBlockNumber;
 	unsigned char bfSuspendReset;
 	unsigned char bPressureResolution;
 	unsigned char bfNoisePreHold;
 	unsigned char bfTouched;
-	unsigned char bSTScan;
 	signed char bMTTouchThreshold;
-	unsigned char bfExitNoiseMode;
-	unsigned char bNoisePipelineBase;
 	unsigned char bTime2Idle;
 	unsigned char bfPowerMode;
-	unsigned char bfIdleMessage;
+	unsigned char bDebugMessage;
+	unsigned char bTimerTriggerScale;
 	unsigned char bDummyRunCycle;
 	unsigned char bfIdleModeCheck;
-
+	unsigned char bfSelftestData;
 };
 
 extern struct rm31080a_ctrl_para g_stCtrl;
 
-int rm31080_ctrl_clear_int(void);
-int rm31080_ctrl_scan_start(void);
-int rm31080_ctrl_read_raw_data(unsigned char *p);
-void rm31080_ctrl_wait_for_scan_finish(void);
+int rm_tch_ctrl_clear_int(void);
+int rm_tch_ctrl_scan_start(void);
+void rm_tch_ctrl_wait_for_scan_finish(void);
 
-void rm31080_ctrl_init(void);
-void rm31080_ctrl_set_baseline(void *arg);
-unsigned char rm31080_ctrl_get_noise_mode(unsigned char *p);
-unsigned char rm31080_ctrl_get_idle_mode(unsigned char *p);
-void rm31080_ctrl_get_parameter(void *arg);
-int rm31080_soft_average(signed char *pSource);
-int rm_noise_detect(signed char *pSource);
-int rm_noise_main(signed char *pSource);
+void rm_tch_ctrl_init(void);
+unsigned char rm_tch_ctrl_get_noise_mode(unsigned char *p);
+unsigned char rm_tch_ctrl_get_idle_mode (unsigned char *p);
+void rm_tch_ctrl_get_parameter(void *arg);
 
 void rm_set_repeat_times(u8 u8Times);
-#endif	/* _RM31080A_CTRL_H_ */
+#endif				/*_RM31080A_CTRL_H_*/
diff --git a/include/linux/spi/rm31080a_ts.h b/include/linux/spi/rm31080a_ts.h
index 9a1364ec8240..3cbd589ecc7a 100644
--- a/include/linux/spi/rm31080a_ts.h
+++ b/include/linux/spi/rm31080a_ts.h
@@ -1,80 +1,64 @@
-/*
- * Raydium RM31080 touchscreen header
- *
- * Copyright (C) 2012-2013, Raydium Semiconductor Corporation.
- * Copyright (C) 2012-2013, NVIDIA Corporation.  All Rights Reserved.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
 #ifndef _RM31080A_TS_H_
 #define _RM31080A_TS_H_
 
-#define ENABLE_SLOW_SCAN
+#define ENABLE_MANUAL_IDLE_MODE			0
 
-#define RM_MAX_CHANNEL_COUNT					128
-#define RM_MAX_MT_COUNT						2048
+#define PARAMETER_AMOUNT				384
 
-/* Define for T007 A6/B1 IC version ckeck */
-#define T007A6								0xD0
-#define T007_VERSION_B							0xB0
-#define T007B1								0xB0
-#define T007B2								0xB1
-#define T007_VERSION_C							0xC0
-
-#define VERSION_A_PARAMETER_OFFSET			0x00
-#define VERSION_B_PARAMETER_OFFSET			0x01
-#define VERSION_C_PARAMETER_OFFSET			0x02
-#define PARAMETER_AMOUNT						384
+/***************************************************************************
+ *	Kernel CTRL Define
+ *	DO NOT MODIFY
+ *	NOTE: Need to sync with HAL
+ ***************************************************************************/
+#define OK						1
+#define FAIL					0
+#define DEBUG_DRIVER			0x01
 
-#define RM_IOCTL_REPORT_POINT					0x1001
-#define RM_IOCTL_SET_HAL_PID					0x1002
+#define RM_IOCTL_REPORT_POINT				0x1001
+#define RM_IOCTL_SET_HAL_PID				0x1002
 #define RM_IOCTL_INIT_START					0x1003
-#define RM_IOCTL_INIT_END						0x1004
-#define RM_IOCTL_FINISH_CALC					0x1005
-#define RM_IOCTL_SCRIBER_CTRL					0x1006
+#define RM_IOCTL_INIT_END					0x1004
+#define RM_IOCTL_FINISH_CALC				0x1005
+#define RM_IOCTL_SCRIBER_CTRL				0x1006
 #define RM_IOCTL_READ_RAW_DATA				0x1007
 #define RM_IOCTL_AUTOSCAN_CTRL				0x1008
-#define RM_IOCTL_NOISE_CHECK					0x1009
+#define RM_IOCTL_NOISE_CHECK				0x1009
 #define RM_IOCTL_GET_PARAMETER				0x100A
-#define RM_IOCTL_SET_PARAMETER				0x100B
-#define RM_IOCTL_SEND_BASELINE				0x100C
-#define RM_IOCTL_SEND_ANALOG_BASELINE		0x100D
-#define RM_IOCTL_SET_VARIABLE					0x1010
-	#define RM_VARIABLE_SELF_TEST_RESULT		0x01
-	#define RM_VARIABLE_SCRIBER_FLAG			0x02
-	#define RM_VARIABLE_AUTOSCAN_FLAG		0x03
-	#define RM_VARIABLE_VERSION				0x04
-	#define RM_VARIABLE_IDLEMODECHECK		0x05
-	#define RM_VARIABLE_REPEAT					0x06
-#define RM_IOCTL_GET_VARIABLE					0x1011
-	#define RM_VARIABLE_PLATFORM_ID			0x01
-#define RM_IOCTL_SET_SLOWSCAN_PARA			0x1012
-#define RM_IOCTL_GET_SACN_MODE				0x1013
-#define RM_IOCTL_CHECK_INIT_STATUS			0x1014
-
-#define RM_INPUT_RESOLUTION_X					4096
-#define RM_INPUT_RESOLUTION_Y					4096
-
-#define RM_TS_SIGNAL							44
-#define RM_TS_MAX_POINTS						16
+#define RM_IOCTL_SET_VARIABLE				0x1010
+#define RM_VARIABLE_SELF_TEST_RESULT			0x01
+#define RM_VARIABLE_SCRIBER_FLAG				0x02
+#define RM_VARIABLE_AUTOSCAN_FLAG				0x03
+#define RM_VARIABLE_VERSION						0x04
+#define RM_VARIABLE_IDLEMODECHECK				0x05
+#define RM_VARIABLE_REPEAT						0x06
+#define RM_VARIABLE_WATCHDOG_FLAG				0x07
+#define RM_VARIABLE_TEST_VERSION				0x08
+#define RM_IOCTL_GET_VARIABLE				0x1011
+#define RM_VARIABLE_PLATFORM_ID					0x01
+#define RM_IOCTL_GET_SACN_MODE				0x1012
+#define RM_IOCTL_SET_KRL_TBL				0x1013
+#define RM_IOCTL_WATCH_DOG					0x1014
+
+#define RM_INPUT_RESOLUTION_X				4096
+#define RM_INPUT_RESOLUTION_Y				4096
+
+#define RM_TS_SIGNAL					44
+#define RM_TS_MAX_POINTS				16
 
 #define RM_SIGNAL_INTR						0x00000001
 #define RM_SIGNAL_SUSPEND					0x00000002
 #define RM_SIGNAL_RESUME					0x00000003
 #define RM_SIGNAL_CHANGE_PARA				0x00000004
-	#define RM_SIGNAL_PARA_SMOOTH			0x00
-	#define RM_SIGNAL_PARA_SELF_TEST			0x01
-#define RM_SIGNAL_ENTER_AUTO_SCAN			0x00000005
-#define RM_SIGNAL_LEAVE_AUTO_SCAN			0x00000006
+#define RM_SIGNAL_WATCH_DOG_CHECK			0x00000005
+#define RM_SIGNAL_PARA_SMOOTH				0x00
+#define RM_SIGNAL_PARA_SELF_TEST			0x01
+
 
 #define RM_SELF_TEST_STATUS_FINISH			0
 #define RM_SELF_TEST_STATUS_TESTING			1
-#define RM_SELF_TEST_RESULT_FAIL				0
-#define RM_SELF_TEST_RESULT_PASS				1
+#define RM_SELF_TEST_RESULT_FAIL			0
+#define RM_SELF_TEST_RESULT_PASS			1
+
 
 /****************************************************************************
  * Platform define
@@ -85,59 +69,96 @@
 #define RM_PLATFORM_D010	0x03
 #define RM_PLATFORM_P005	0x04
 #define RM_PLATFORM_R005	0x05
-#define RM_PLATFORM_A110	0x10
-#define RM_PLATFORM_A10L	0x11
-
-#ifdef ENABLE_SLOW_SCAN
-#define RM_SLOW_SCAN_INTERVAL					20
-#define RM_SLOW_SCAN_CMD_COUNT				0x10
-enum RM_SLOW_SCAN_LEVELS {
-	RM_SLOW_SCAN_LEVEL_NORMAL,
-	RM_SLOW_SCAN_LEVEL_20,
-	RM_SLOW_SCAN_LEVEL_40,
-	RM_SLOW_SCAN_LEVEL_60,
-	RM_SLOW_SCAN_LEVEL_80,
-	RM_SLOW_SCAN_LEVEL_100,
-	RM_SLOW_SCAN_LEVEL_120,
-	RM_SLOW_SCAN_LEVEL_140,
-	RM_SLOW_SCAN_LEVEL_160,
-	RM_SLOW_SCAN_LEVEL_180,
-	RM_SLOW_SCAN_LEVEL_200,
-	RM_SLOW_SCAN_LEVEL_220,
-	RM_SLOW_SCAN_LEVEL_240,
-	RM_SLOW_SCAN_LEVEL_260,
-	RM_SLOW_SCAN_LEVEL_280,
-	RM_SLOW_SCAN_LEVEL_MAX,
-	RM_SLOW_SCAN_LEVEL_COUNT
-};
-#endif
+#define RM_PLATFORM_RAYPRJ	0x80
 
+/***************************************************************************
+ *	DO NOT MODIFY - Kernel CTRL Define
+ *	NOTE: Need to sync with HAL
+ ***************************************************************************/
 
-struct rm_cmd_element {
-	unsigned char addr;
-	unsigned char value;
-};
 
-struct rm_cmd_list {
-	unsigned char count;
-	struct rm_cmd_element cmd[0];
-};
 
-struct rm_cmd_slow_scan {
-	unsigned char count;
-	struct rm_cmd_element cmd[RM_SLOW_SCAN_CMD_COUNT];
-};
+/***************************************************************************
+ *	Kernel Command Set
+ *	DO NOT MODIFY
+ *	NOTE: Need to sync with HAL
+ ***************************************************************************/
+#define KRL_TBL_CMD_LEN					3
+
+#define KRL_INDEX_FUNC_SET_IDLE			0
+#define KRL_INDEX_FUNC_PAUSE_AUTO		1
+#define KRL_INDEX_RM_START				2
+#define KRL_INDEX_RM_END				3
+#define KRL_INDEX_RM_READ_IMG			4
+#define KRL_INDEX_RM_WATCHDOG			5
+#define KRL_INDEX_RM_TESTMODE			6
+#define KRL_INDEX_RM_SLOWSCAN			7
+
+#define KRL_SIZE_SET_IDLE				128
+#define KRL_SIZE_PAUSE_AUTO				64
+#define KRL_SIZE_RM_START				64
+#define KRL_SIZE_RM_END					64
+#define KRL_SIZE_RM_READ_IMG			64
+#define KRL_SIZE_RM_WATCHDOG			96
+#define KRL_SIZE_RM_TESTMODE			96
+#define KRL_SIZE_RM_SLOWSCAN			128
+
+#define KRL_TBL_FIELD_POS_LEN_H					0
+#define KRL_TBL_FIELD_POS_LEN_L					1
+#define KRL_TBL_FIELD_POS_CASE_NUM				2
+#define KRL_TBL_FIELD_POS_CMD_NUM				3
+
+#define KRL_CMD_READ						0x11
+#define KRL_CMD_WRITE_W_DATA				0x12
+#define KRL_CMD_WRITE_WO_DATA				0x13
+#define KRL_CMD_AND							0x18
+#define KRL_CMD_OR							0x19
+#define KRL_CMD_NOT							0x1A
+#define KRL_CMD_XOR							0x1B
+
+#define KRL_CMD_SEND_SIGNAL					0x20
+#define KRL_CMD_CONFIG_RST					0x21
+#define KRL_SUB_CMD_SET_RST_GPIO				0x00
+#define KRL_SUB_CMD_SET_RST_VALUE				0x01
+#define KRL_CMD_SET_TIMER					0x22
+#define KRL_SUB_CMD_INIT_TIMER					0x00
+#define KRL_SUB_CMD_ADD_TIMER					0x01
+#define KRL_SUB_CMD_DEL_TIMER					0x02
+#define KRL_CMD_CONFIG_3V3					0x23
+#define KRL_SUB_CMD_SET_3V3_GPIO				0x00
+#define KRL_SUB_CMD_SET_3V3_REGULATOR			0x01
+#define KRL_CMD_CONFIG_1V8					0x24
+#define KRL_SUB_CMD_SET_1V8_GPIO				0x00
+#define KRL_SUB_CMD_SET_1V8_REGULATOR			0x01
+#define KRL_CMD_CONFIG_CLK					0x25
+#define KRL_SUB_CMD_SET_CLK						0x00
+
+#define KRL_CMD_USLEEP						0x40
+#define KRL_CMD_MSLEEP						0x41
+
+#define KRL_CMD_FLUSH_QU					0x52
+#define KRL_SUB_CMD_SENSOR_QU					0x00
+#define KRL_SUB_CMD_TIMER_QU					0x01
+
+#define KRL_CMD_READ_IMG					0x60
+
+/***************************************************************************
+ *	DO NOT MODIFY - Kernel Command Set
+ *	NOTE: Need to sync with HAL
+ ***************************************************************************/
 
-struct rm_touch_event {
+typedef struct {
 	unsigned char ucTouchCount;
 	unsigned char ucID[RM_TS_MAX_POINTS];
 	unsigned short usX[RM_TS_MAX_POINTS];
 	unsigned short usY[RM_TS_MAX_POINTS];
 	unsigned short usZ[RM_TS_MAX_POINTS];
-};
+} rm_touch_event;
 
 struct rm_spi_ts_platform_data {
 	int gpio_reset;
+	int gpio_1v8;
+	int gpio_3v3;
 	int x_size;
 	int y_size;
 	unsigned char *config;
@@ -146,12 +167,9 @@ struct rm_spi_ts_platform_data {
 	unsigned char *name_of_clock_con;
 };
 
-int rm31080_spi_byte_write(unsigned char u8Addr, unsigned char u8Value);
-int rm31080_spi_byte_read(unsigned char u8Addr, unsigned char *pu8Value);
-int rm31080_spi_burst_write(unsigned char *pBuf, unsigned int u32Len);
-void rm31080_disable_touch(void);
-void rm31080_enable_touch(void);
-void rm31080_set_autoscan(unsigned char val);
-int rm31080_ts_send_signal(int pid, int iInfo);
+int rm_tch_spi_byte_write(unsigned char u8Addr, unsigned char u8Value);
+int rm_tch_spi_byte_read(unsigned char u8Addr, unsigned char *pu8Value);
+int rm_tch_spi_burst_write(unsigned char *pBuf, unsigned int u32Len);
+void rm_tch_set_autoscan(unsigned char val);
 
-#endif	/*_RM31080A_TS_H_*/
+#endif				/*_RM31080A_TS_H_*/