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authorDong Aisheng <b29396@freescale.com>2015-03-31 21:20:26 +0800
committerguoyin.chen <guoyin.chen@freescale.com>2015-05-08 17:26:03 +0800
commit0bcaab44823be5989609dc49cf0c8a6d5a22259f (patch)
treec610c4ffc2335e9f58e8ebc42641e428cadbc5ce /include
parent127aa6de1af8a1829dea04db11d21666addbf05d (diff)
MLK-10571-1 clk: core: add CLK_SET_PARENT_ON flags to support clocks require parent on
On Freescale i.MX7D platform, all clocks operations, including enable/disable, rate change and re-parent, requires its parent clock on. Current clock core can not support it well. This patch introduce a new flag CLK_SET_PARENT_ON to handle this special case in clock core that enable its parent clock firstly for each operation and disable it later after operation complete. The most special case is for set_parent() operation which requires both parent, old one and new one, to be enabled at the same time during the operation. Acked-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> Signed-off-by: Dong Aisheng <b29396@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/clk-provider.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 27b05ea62276..a0ab2652ad19 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -36,6 +36,11 @@
* clocks through this child mux.
*/
#define CLK_IS_BASIC_MUX BIT(9)
+/*
+ * parent clock must be on across any operation including
+ * clock gate/ungate, rate change and re-parent
+ */
+#define CLK_SET_PARENT_ON BIT(10)
struct clk_hw;