diff options
| author | Quinn Jensen <quinn.jensen@freescale.com> | 2007-10-24 21:26:33 -0600 |
|---|---|---|
| committer | Quinn Jensen <quinn.jensen@freescale.com> | 2007-10-24 21:26:33 -0600 |
| commit | 0c129f1be7a29163e62899254326d8d15a9d3ef9 (patch) | |
| tree | 3db454a7d00e4dc24b80249b18c13e07170f2634 /include | |
| parent | 3c26454dc04f150f577049bf1f1adf6c999f126b (diff) | |
CR ENGR00050116 Fix flawed implementation of XIP Macros
Patch for CR ENGR00050116 Fix flawed implementation of XIP Macros.
The existing flawed implementations of xip_currtime, xip_elasped_since
and xip_irqpending macros are fixed. Applies to linux 2.6.22 kernel
for MX platforms.
http://www.bitshrine.org/gpp/linux-2.6.22-mx-CR-ENGR00050116-Fix-flawed-implementation-.patch
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-mxc/mtd-xip.h | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/include/asm-arm/arch-mxc/mtd-xip.h b/include/asm-arm/arch-mxc/mtd-xip.h index b934bc894662..e0e91d6b18ff 100644 --- a/include/asm-arm/arch-mxc/mtd-xip.h +++ b/include/asm-arm/arch-mxc/mtd-xip.h @@ -20,13 +20,29 @@ #ifndef __ARCH_MXC_MTD_XIP_H__ #define __ARCH_MXC_MTD_XIP_H__ +#include <linux/clocksource.h> #include <asm/hardware.h> #include <asm/arch/system.h> + #define xip_irqpending() \ - (~(__raw_readl(AVIC_NIVECSR) & __raw_readl(AVIC_FIVECSR))) -#define xip_currtime() get_cycles() -#define xip_elapsed_since(x) \ - (signed)(((xip_currtime() - (x)) * USEC_PER_SEC) / LATCH) + ((__raw_readl(AVIC_NIVECSR) & __raw_readl(AVIC_FIVECSR)) != 0xFFFFFFFF) + +extern struct clocksource *mtd_xip_clksrc; + +#define xip_currtime() (unsigned long)clocksource_read(mtd_xip_clksrc) + +#if CLOCK_TICK_RATE > 1000000 +#define NUMERATOR 1 +#define DENOMINATOR (CLOCK_TICK_RATE/1000000 + 1) +#else +#define NUMERATOR (1000000/CLOCK_TICK_RATE) +#define DENOMINATOR 1 +#endif + +static inline unsigned long xip_elapsed_since(unsigned long x) +{ + return (((xip_currtime() - x) * NUMERATOR) / DENOMINATOR); +} /* * Wait For Interrupt command for XIP kernel to put CPU in Idle mode |