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authorQuinn Jensen <quinn.jensen@freescale.com>2007-10-24 21:19:54 -0600
committerQuinn Jensen <quinn.jensen@freescale.com>2007-10-24 21:19:54 -0600
commitf2d85e829634db0871da8563b7bc6ce296ffb541 (patch)
treeaba94ce8b281811991efbd647c706769de73f6da /include
parent71c0e4127254268045526a6ec4e42d7354cd9a17 (diff)
ARM926 (MX27) D-cache writethrough bug fix.
Patch for ARM926 (MX27) D-cache writethrough bug fix. Source: linux-arm-kernel list, posted by Gilles Maigne on 11/17/06. Text from e-mail posting: arm926_dma_flush_range write the content of dcache in memory when linux is configured with CONFIG_CPU_DCACHE_WRITETHROUGH ( cache in write-through) and does not invalidate the virtual address range. This is wrong for two reasons : 1/ the cache line does not need to be written because the cache is write-through 2/ the cache line is not invalidated, so next read at this address may come from the cache, which is wrong because main memory may contain valid data resulting of a DMA transaction. This patch applies to linux 2.6.18 http://www.bitshrine.org/gpp/linux-2.6.19.2-mx-arm926_dcache_writethrough_flush_fix.patch http://www.bitshrine.org/gpp/linux-2.6.22-mx-ARM926-MX27-D-cache-writethrough-bug-fix.patch
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