diff options
| author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2012-08-23 22:57:50 -0500 |
|---|---|---|
| committer | Xinyu Chen <xinyu.chen@freescale.com> | 2012-08-24 13:37:17 +0800 |
| commit | e61df589a843d28483c6d94a9d7c0b3517e6e832 (patch) | |
| tree | bcf70d3916244e090dbca003b4f43db3c2403a24 /samples | |
| parent | ac8f43ae39627e6ddb2072521fc8b6014c48e7cd (diff) | |
ENGR00221277 MX6DL/S - Set AXI clock to 270MHzimx-android-r13.4-beta
Change AXI_CLK to be sourced from PLL3_PFD1_540MHz, so that it
can run at 270MHz on MX6DL/S. This is required for improving
VPU performance.
Change AXI_CLK to be sourced from periph_clk just before the DDR
freq is going to be dropped to 24MHz/50MHz. Change it back
to PLL3_PFD1_540 when the DDR freq is back at 400MHz.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Diffstat (limited to 'samples')
0 files changed, 0 insertions, 0 deletions