diff options
| author | Nicolin Chen <b42378@freescale.com> | 2013-11-18 17:35:19 +0800 |
|---|---|---|
| committer | Nicolin Chen <b42378@freescale.com> | 2013-11-19 18:04:41 +0800 |
| commit | fedc5ed22fb20c040eae40141e7111445b2723b1 (patch) | |
| tree | 938f2cc9ad256fbd6ad5583e44a59eaaba46b9e4 /sound | |
| parent | 0d9aa40eafa0721689b6059dba22c4f9c1b9a5ac (diff) | |
ENGR00288421-2 ASoC: fsl_spdif: Ignore system clock due to potential risk
The current clock selecting mechanism would choose a clock and set its rate
later when using it. It might be feasible for other clock sources but not
for sysclk -- ipg clock. Changing ipg clock rate in specific driver would
be a dangerous operation, so we here ingore the sysclk and will restore it
after we accomplish a better mechanism.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/fsl/fsl_spdif.c | 7 | ||||
| -rw-r--r-- | sound/soc/fsl/fsl_spdif.h | 2 |
2 files changed, 9 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c index 266f72453e18..10e5c7568c4e 100644 --- a/sound/soc/fsl/fsl_spdif.c +++ b/sound/soc/fsl/fsl_spdif.c @@ -1065,6 +1065,13 @@ static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv, if (!clk_get_rate(clk)) continue; + /* TODO: We here ignore sysclk source due to imperfect clock + * selecting mechanism: sysclk is a bit different which we can + * not change its clock rate but use another inner divider to + * derive a proper clock rate. */ + if (i == SPDIF_CLK_SRC_SYSCLK) + continue; + ret = fsl_spdif_txclk_caldiv(spdif_priv, clk, savesub, index); if (savesub == ret) continue; diff --git a/sound/soc/fsl/fsl_spdif.h b/sound/soc/fsl/fsl_spdif.h index b1266790d117..dbbbb1e00228 100644 --- a/sound/soc/fsl/fsl_spdif.h +++ b/sound/soc/fsl/fsl_spdif.h @@ -157,6 +157,8 @@ enum spdif_gainsel { #define STC_TXCLK_DIV(x) ((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_TXCLK_DIV_MASK) #define STC_TXCLK_SRC_MAX 8 +#define SPDIF_CLK_SRC_SYSCLK 5 + /* SPDIF tx rate */ enum spdif_txrate { SPDIF_TXRATE_32000 = 0, |