diff options
| author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2017-04-28 16:36:05 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2017-06-09 22:19:44 +0800 |
| commit | 25fb06d0181f0b9ae3e6329c75a89d9b5472a760 (patch) | |
| tree | cf73a510986e2bc465dbf7ff7d20179a9133460c /sound | |
| parent | 9cc10e1b4cc4ed918e2092d773888cab6f82cada (diff) | |
MLK-14784: ASoC: fsl_esai: fix esai register setting issue in RIGHT_J mode
The ESAI_xCR_xWA is xCR's bit, not the xCCR's bit. driver set it to
wrong register, correct it in this patch.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/fsl/fsl_esai.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c index 2ce29ec3769c..9a299976dc41 100644 --- a/sound/soc/fsl/fsl_esai.c +++ b/sound/soc/fsl/fsl_esai.c @@ -401,7 +401,8 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) break; case SND_SOC_DAIFMT_RIGHT_J: /* Data on rising edge of bclk, frame high, right aligned */ - xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCR_xWA; + xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP; + xcr |= ESAI_xCR_xWA; break; case SND_SOC_DAIFMT_DSP_A: /* Data on rising edge of bclk, frame high, 1clk before data */ @@ -458,12 +459,12 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) return -EINVAL; } - mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR; + mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR | ESAI_xCR_xWA; regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, xcr); regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR, mask, xcr); mask = ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCCR_xFSP | - ESAI_xCCR_xFSD | ESAI_xCCR_xCKD | ESAI_xCR_xWA; + ESAI_xCCR_xFSD | ESAI_xCCR_xCKD; regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, mask, xccr); regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, mask, xccr); |