diff options
| author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2017-04-28 10:24:53 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2017-06-09 22:19:43 +0800 |
| commit | 9cc10e1b4cc4ed918e2092d773888cab6f82cada (patch) | |
| tree | 4805b148ebbc595041ed70ad054f964006c18db8 /sound | |
| parent | 9e3c04a3e9222a8cdf8da6d3c85ca9da28514ec1 (diff) | |
MLK-14761: ASoC: fsl_esai: fix esai sync mode can't work
In ESAI synchronous mode, the clock is generated by Tx, So
we should always set registers of Tx which relate with the
bit clock and frame clock generation (TCCR, TCR, ECR), even
there is only Rx is working.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/fsl/fsl_esai.c | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c index 643f782f6921..2ce29ec3769c 100644 --- a/sound/soc/fsl/fsl_esai.c +++ b/sound/soc/fsl/fsl_esai.c @@ -224,6 +224,21 @@ static int fsl_esai_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned long clk_rate; int ret; + if (esai_priv->synchronous && !tx) { + switch (clk_id) { + case ESAI_HCKR_FSYS: + fsl_esai_set_dai_sysclk(dai, ESAI_HCKT_FSYS, + freq, dir); + break; + case ESAI_HCKR_EXTAL: + fsl_esai_set_dai_sysclk(dai, ESAI_HCKT_EXTAL, + freq, dir); + break; + default: + return -EINVAL; + } + } + /* Bypass divider settings if the requirement doesn't change */ if (freq == esai_priv->hck_rate[tx] && dir == esai_priv->hck_dir[tx]) return 0; @@ -532,10 +547,21 @@ static int fsl_esai_hw_params(struct snd_pcm_substream *substream, bclk = params_rate(params) * slot_width * esai_priv->slots; - ret = fsl_esai_set_bclk(dai, tx, bclk); + ret = fsl_esai_set_bclk(dai, esai_priv->synchronous ? true : tx, bclk); if (ret) return ret; + if (esai_priv->synchronous && !tx) { + /* Use Normal mode to support monaural audio */ + regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, + ESAI_xCR_xMOD_MASK, params_channels(params) > 1 ? + ESAI_xCR_xMOD_NETWORK : 0); + + mask = ESAI_xCR_xSWS_MASK | ESAI_xCR_PADC; + val = ESAI_xCR_xSWS(slot_width, width) | ESAI_xCR_PADC; + regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, val); + } + /* Use Normal mode to support monaural audio */ regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), ESAI_xCR_xMOD_MASK, params_channels(params) > 1 ? |