diff options
| author | Vinod Subbarayalu <vsubbarayalu@nvidia.com> | 2012-12-20 17:25:29 -0800 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2012-12-26 20:08:09 -0800 |
| commit | 067dc903681d0647f1435cb3e0d3555814d1784f (patch) | |
| tree | a466be1d55782e0335ad933f9e89c780c91a2918 /sound | |
| parent | 113a9e90c82a991e293580119fb6df1882f9da84 (diff) | |
audio:Add support to configure NXP based on In-hand/On-desk mode and Volume Control
Change-Id: I7f0630a8fa35687714d9f5bf2fbb0976c6b969a4
Signed-off-by: Vinod Subbarayalu <vsubbarayalu@nvidia.com>
Reviewed-on: http://git-master/r/173278
Reviewed-by: Scott Peterson <speterson@nvidia.com>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/tegra/tegra_rt5640.c | 64 |
1 files changed, 40 insertions, 24 deletions
diff --git a/sound/soc/tegra/tegra_rt5640.c b/sound/soc/tegra/tegra_rt5640.c index e2815c7793c6..3e606415aaec 100644 --- a/sound/soc/tegra/tegra_rt5640.c +++ b/sound/soc/tegra/tegra_rt5640.c @@ -65,6 +65,8 @@ #define GPIO_EXT_MIC_EN BIT(3) #define GPIO_HP_DET BIT(4) +struct tegra30_i2s *i2s_tfa = NULL; + struct tegra_rt5640 { struct tegra_asoc_utils_data util_data; struct tegra_asoc_platform_data *pdata; @@ -79,6 +81,33 @@ struct tegra_rt5640 { volatile int clock_enabled; }; +void enable_clks(struct tegra30_i2s *i2s) +{ + tegra30_ahub_enable_clocks(); + clk_enable(i2s->clk_i2s); + tegra30_ahub_enable_tx_fifo(i2s->txcif); + i2s->reg_ctrl |= TEGRA30_I2S_CTRL_XFER_EN_TX; + #ifdef CONFIG_PM + i2s->reg_cache[TEGRA30_I2S_CTRL >> 2] = i2s->reg_ctrl; + #endif + __raw_writel(i2s->reg_ctrl, i2s->regs + TEGRA30_I2S_CTRL); +} + +void disable_clks(struct tegra30_i2s *i2s) +{ + int dcnt = 10; + i2s->reg_ctrl &= ~TEGRA30_I2S_CTRL_XFER_EN_TX; + #ifdef CONFIG_PM + i2s->reg_cache[TEGRA30_I2S_CTRL >> 2] = i2s->reg_ctrl; + #endif + __raw_writel(i2s->reg_ctrl, i2s->regs + TEGRA30_I2S_CTRL); + while (tegra30_ahub_tx_fifo_is_enabled(i2s->id) && dcnt--) + udelay(100); + clk_disable(i2s->clk_i2s); + tegra30_ahub_disable_clocks(); + tegra30_ahub_disable_tx_fifo(i2s->txcif); +} + static int tegra_rt5640_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { @@ -93,7 +122,6 @@ static int tegra_rt5640_hw_params(struct snd_pcm_substream *substream, int srate, mclk, i2s_daifmt; int err, rate; static unsigned initTfa = 0; - int dcnt = 10; srate = params_rate(params); mclk = 256 * srate; @@ -156,27 +184,11 @@ static int tegra_rt5640_hw_params(struct snd_pcm_substream *substream, } if(machine_is_roth()) { if(initTfa == 1) { - tegra30_ahub_enable_clocks(); - clk_enable(i2s->clk_i2s); - tegra30_ahub_enable_tx_fifo(i2s->txcif); - i2s->reg_ctrl |= TEGRA30_I2S_CTRL_XFER_EN_TX; - #ifdef CONFIG_PM - i2s->reg_cache[TEGRA30_I2S_CTRL >> 2] = i2s->reg_ctrl; - #endif - __raw_writel(i2s->reg_ctrl, i2s->regs + TEGRA30_I2S_CTRL); + i2s_tfa = i2s; + enable_clks(i2s); pr_info("INIT TFA\n"); - Tfa9887_Init(); - i2s->reg_ctrl &= ~TEGRA30_I2S_CTRL_XFER_EN_TX; - #ifdef CONFIG_PM - i2s->reg_cache[TEGRA30_I2S_CTRL >> 2] = i2s->reg_ctrl; - #endif - __raw_writel(i2s->reg_ctrl, i2s->regs + TEGRA30_I2S_CTRL); - while (tegra30_ahub_tx_fifo_is_enabled(i2s->id) && dcnt--) - udelay(100); - clk_disable(i2s->clk_i2s); - tegra30_ahub_disable_clocks(); - tegra30_ahub_disable_tx_fifo(i2s->txcif); - + Tfa9887_Init(srate); + disable_clks(i2s); } initTfa++; } @@ -448,12 +460,16 @@ static int tegra_rt5640_event_int_spk(struct snd_soc_dapm_widget *w, } if(machine_is_roth()) { if (SND_SOC_DAPM_EVENT_ON(event)) { - Tfa9887_Powerdown(0); + if(i2s_tfa) { + enable_clks(i2s_tfa); + Tfa9887_Powerdown(0); + disable_clks(i2s_tfa); + } } else { - Tfa9887_Powerdown(1); + Tfa9887_Powerdown(1); } - } + } if (!(machine->gpio_requested & GPIO_SPKR_EN)) return 0; |