diff options
| author | Dara Ramesh <dramesh@nvidia.com> | 2012-12-13 15:18:24 +0530 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2013-01-04 15:35:03 -0800 |
| commit | 32322c40a54c8fd8d9b2aeef2a11a888a796794b (patch) | |
| tree | 3b5a2356ebc04860d6badb21c635d70b2632f60c /sound | |
| parent | b1682c1befae19107ed88d298f71c9bee9ea1e2b (diff) | |
asoc:tegra: fix dam cif programming
as per dam spec file chout is fixed to 32bits
so accept chout and ch1 input as 32bit always.
Reviewed-on: http://git-master/r/170931
(cherry picked from commit dd07f40144f763be77ce4e2aea5e7d4d22e6a134)
Change-Id: Ie423bb62e88ca2800b8a9180381685b5e085379f
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: http://git-master/r/188287
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/tegra/tegra30_dam.c | 8 | ||||
| -rw-r--r-- | sound/soc/tegra/tegra_aic326x.c | 7 | ||||
| -rw-r--r-- | sound/soc/tegra/tegra_cs42l73.c | 7 | ||||
| -rw-r--r-- | sound/soc/tegra/tegra_max98088.c | 7 |
4 files changed, 21 insertions, 8 deletions
diff --git a/sound/soc/tegra/tegra30_dam.c b/sound/soc/tegra/tegra30_dam.c index bb42edc2e199..26b65df95474 100644 --- a/sound/soc/tegra/tegra30_dam.c +++ b/sound/soc/tegra/tegra30_dam.c @@ -676,9 +676,13 @@ int tegra30_dam_set_acif(int ifc, int chid, unsigned int audio_channels, return -EINVAL; #ifndef CONFIG_ARCH_TEGRA_3x_SOC - /*ch0 takes input as mono/32bit always*/ + /*ch0 takes input as mono always*/ if ((chid == dam_ch_in0) && - ((client_channels != 1) || (client_bits != 32))) + ((client_channels != 1))) + return -EINVAL; + /*as per dam spec file chout is fixed to 32 bits*/ + /*so accept ch0, ch1 and chout as 32bit always*/ + if (client_bits != 32) return -EINVAL; #else /*ch0 takes input as mono/16bit always*/ diff --git a/sound/soc/tegra/tegra_aic326x.c b/sound/soc/tegra/tegra_aic326x.c index 9b7d0e6f8c08..6b6359980229 100644 --- a/sound/soc/tegra/tegra_aic326x.c +++ b/sound/soc/tegra/tegra_aic326x.c @@ -243,14 +243,17 @@ static int tegra_aic326x_set_dam_cif(int dam_ifc, int srate, srate); tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN1, srate); +#ifndef CONFIG_ARCH_TEGRA_3x_SOC tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1, channels, bit_size, channels, - bit_size); -#ifndef CONFIG_ARCH_TEGRA_3x_SOC + 32); tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT, channels, bit_size, channels, 32); #else + tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1, + channels, bit_size, channels, + bit_size); tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT, channels, bit_size, channels, bit_size); diff --git a/sound/soc/tegra/tegra_cs42l73.c b/sound/soc/tegra/tegra_cs42l73.c index efd717403370..b1d9cfe0701a 100644 --- a/sound/soc/tegra/tegra_cs42l73.c +++ b/sound/soc/tegra/tegra_cs42l73.c @@ -186,14 +186,17 @@ static int tegra_cs42l73_set_dam_cif(int dam_ifc, int srate, srate); tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN1, srate); +#ifndef CONFIG_ARCH_TEGRA_3x_SOC tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1, channels, bit_size, channels, - bit_size); -#ifndef CONFIG_ARCH_TEGRA_3x_SOC + 32); tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT, channels, bit_size, channels, 32); #else + tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1, + channels, bit_size, channels, + bit_size); tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT, channels, bit_size, channels, bit_size); diff --git a/sound/soc/tegra/tegra_max98088.c b/sound/soc/tegra/tegra_max98088.c index 819075871fde..714943a0f216 100644 --- a/sound/soc/tegra/tegra_max98088.c +++ b/sound/soc/tegra/tegra_max98088.c @@ -181,14 +181,17 @@ static int tegra_max98088_set_dam_cif(int dam_ifc, int srate, srate); tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN1, srate); +#ifndef CONFIG_ARCH_TEGRA_3x_SOC tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1, channels, bit_size, channels, - bit_size); -#ifndef CONFIG_ARCH_TEGRA_3x_SOC + 32); tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT, channels, bit_size, channels, 32); #else + tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1, + channels, bit_size, channels, + bit_size); tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT, channels, bit_size, channels, bit_size); |