diff options
author | Mike Dyer <mike.dyer@md-soft.co.uk> | 2013-08-16 18:36:28 +0100 |
---|---|---|
committer | Ben Hutchings <ben@decadent.org.uk> | 2013-10-26 21:05:59 +0100 |
commit | 5c22eba5c7a15d915352743238facb571375107d (patch) | |
tree | 8f33f570e2f1f9e09f35c07b2b7a0572aeb7caa2 /sound | |
parent | 44527b813312ca17cc98623b2cbc9ce1f473038a (diff) |
ASoC: wm8960: Fix PLL register writes
commit 85fa532b6ef920b32598df86b194571a7059a77c upstream.
Bit 9 of PLL2,3 and 4 is reserved as '0'. The 24bit fractional part
should be split across each register in 8bit chunks.
Signed-off-by: Mike Dyer <mike.dyer@md-soft.co.uk>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/codecs/wm8960.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 2df253c18568..ef96ca6bfbe1 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -805,9 +805,9 @@ static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, if (pll_div.k) { reg |= 0x20; - snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f); - snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff); - snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff); + snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff); + snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff); + snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff); } snd_soc_write(codec, WM8960_PLL1, reg); |