diff options
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 6 | ||||
| -rw-r--r-- | drivers/pci/dwc/pci-imx6.c | 19 |
2 files changed, 22 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index 9a4c5e716d80..b60f355869ba 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -4244,8 +4244,9 @@ clocks = <&clk IMX8QM_HSIO_PCIE_A_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_A_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>, + <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, <&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi"; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi"; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic 0 73 4>, @@ -4286,8 +4287,9 @@ clocks = <&clk IMX8QM_HSIO_PCIE_B_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_B_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>, + <&clk IMX8QM_HSIO_PCIE_X1_PER_CLK>, <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi"; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi"; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic 0 105 4>, diff --git a/drivers/pci/dwc/pci-imx6.c b/drivers/pci/dwc/pci-imx6.c index 7855ded3102f..5ecae3b160be 100644 --- a/drivers/pci/dwc/pci-imx6.c +++ b/drivers/pci/dwc/pci-imx6.c @@ -78,6 +78,7 @@ struct imx_pcie { struct clk *pcie_bus; struct clk *pcie_phy; struct clk *pcie_inbound_axi; + struct clk *pcie_per; struct clk *pcie; struct clk *pcie_ext; struct clk *pcie_ext_src; @@ -640,8 +641,17 @@ static int imx_pcie_enable_ref_clk(struct imx_pcie *imx_pcie) case IMX8QXP: case IMX8QM: ret = clk_prepare_enable(imx_pcie->pcie_inbound_axi); - if (ret) + if (ret) { dev_err(dev, "unable to enable pcie_axi clock\n"); + break; + } + ret = clk_prepare_enable(imx_pcie->pcie_per); + if (ret) { + dev_err(dev, "unable to enable pcie_per clock\n"); + clk_disable_unprepare(imx_pcie->pcie_inbound_axi); + break; + } + break; } @@ -1499,6 +1509,7 @@ static void pci_imx_clk_disable(struct device *dev) break; case IMX8QXP: case IMX8QM: + clk_disable_unprepare(imx_pcie->pcie_per); clk_disable_unprepare(imx_pcie->pcie_inbound_axi); break; } @@ -2496,6 +2507,12 @@ static int imx_pcie_probe(struct platform_device *pdev) ("fsl,imx6sx-iomuxc-gpr"); } else if (imx_pcie->variant == IMX8QM || imx_pcie->variant == IMX8QXP) { + imx_pcie->pcie_per = devm_clk_get(dev, "pcie_per"); + if (IS_ERR(imx_pcie->pcie_per)) { + dev_err(dev, "pcie_per clock source missing or invalid\n"); + return PTR_ERR(imx_pcie->pcie_per); + } + imx_pcie->iomuxc_gpr = syscon_regmap_lookup_by_phandle(node, "hsio"); imx_pcie->pcie_inbound_axi = devm_clk_get(&pdev->dev, |