diff options
| -rw-r--r-- | drivers/mtd/spi-nor/fsl-flexspi.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/mtd/spi-nor/fsl-flexspi.c b/drivers/mtd/spi-nor/fsl-flexspi.c index 7828b6b80c2e..d4f122bddea7 100644 --- a/drivers/mtd/spi-nor/fsl-flexspi.c +++ b/drivers/mtd/spi-nor/fsl-flexspi.c @@ -97,6 +97,8 @@ #define FLEXSPI_MCR2_ABR_CMD_MASK (1 << FLEXSPI_MCR2_ABR_CMD_SHIFT) #define FLEXSPI_AHBCR 0x0c +#define FLEXSPI_AHBCR_RDADDROPT_SHIFT 6 +#define FLEXSPI_AHBCR_RDADDROPT_MASK (1 << FLEXSPI_AHBCR_RDADDROPT_SHIFT) #define FLEXSPI_AHBCR_PREF_EN_SHIFT 5 #define FLEXSPI_AHBCR_PREF_EN_MASK (1 << FLEXSPI_AHBCR_PREF_EN_SHIFT) #define FLEXSPI_AHBCR_BUFF_EN_SHIFT 4 @@ -697,7 +699,6 @@ fsl_flexspi_runcmd(struct fsl_flexspi *flex, u8 cmd, unsigned int addr, int len) (reg & FLEXSPI_STS0_SEQ_IDLE_MASK)) break; udelay(1); - dev_err(flex->dev, "The controller is busy, 0x%x\n", reg); } while (1); /* trigger the LUT now */ @@ -878,7 +879,9 @@ static void fsl_flexspi_init_ahb_read(struct fsl_flexspi *flex) FLEXSPI_AHBRXBUF0CR7_PREF_MASK), base + FLEXSPI_AHBRX_BUF7CR0); - writel(FLEXSPI_AHBCR_PREF_EN_MASK, base + FLEXSPI_AHBCR); + /* prefetch and no start address alignment limitation */ + writel(FLEXSPI_AHBCR_PREF_EN_MASK | FLEXSPI_AHBCR_RDADDROPT_MASK, + base + FLEXSPI_AHBCR); /* Set the default lut sequence for AHB Read. */ seqid = fsl_flexspi_get_seqid(flex, nor->read_opcode); |