diff options
| -rw-r--r-- | arch/arm/mach-imx/common.h | 4 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mach-imx51.c | 39 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mach-imx53.c | 11 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mm-imx5.c | 44 |
4 files changed, 50 insertions, 48 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 1156bf6cbeb5..b480f0bb66be 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -34,8 +34,6 @@ void imx25_init_early(void); void imx27_init_early(void); void imx31_init_early(void); void imx35_init_early(void); -void imx51_init_early(void); -void imx53_init_early(void); void mxc_init_irq(void __iomem *); void tzic_init_irq(void); void mx1_init_irq(void); @@ -50,8 +48,6 @@ void imx25_soc_init(void); void imx27_soc_init(void); void imx31_soc_init(void); void imx35_soc_init(void); -void imx51_init_late(void); -void imx53_init_late(void); void epit_timer_init(void __iomem *base, int irq); void mxc_timer_init(void __iomem *, int); void mxc_timer_init_dt(struct device_node *); diff --git a/arch/arm/mach-imx/mach-imx51.c b/arch/arm/mach-imx/mach-imx51.c index a849d432719a..a2027d298a3f 100644 --- a/arch/arm/mach-imx/mach-imx51.c +++ b/arch/arm/mach-imx/mach-imx51.c @@ -10,6 +10,7 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include <linux/io.h> #include <linux/irq.h> #include <linux/of_irq.h> #include <linux/of_platform.h> @@ -17,18 +18,56 @@ #include <asm/mach/time.h> #include "common.h" +#include "hardware.h" #include "mx51.h" +static void __init imx51_init_early(void) +{ + mxc_set_cpu_type(MXC_CPU_MX51); +} + +/* + * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by + * the Freescale marketing division. However this did not remove the + * hardware from the chip which still needs to be configured for proper + * IPU support. + */ +#define MX51_MIPI_HSC_BASE 0x83fdc000 +static void __init imx51_ipu_mipi_setup(void) +{ + void __iomem *hsc_addr; + + hsc_addr = ioremap(MX51_MIPI_HSC_BASE, SZ_16K); + WARN_ON(!hsc_addr); + + /* setup MIPI module to legacy mode */ + __raw_writel(0xf00, hsc_addr); + + /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */ + __raw_writel(__raw_readl(hsc_addr + 0x800) | 0x30ff, + hsc_addr + 0x800); + + iounmap(hsc_addr); +} + static void __init imx51_dt_init(void) { struct platform_device_info devinfo = { .name = "cpufreq-cpu0", }; mxc_arch_reset_init_dt(); + imx51_ipu_mipi_setup(); + imx_src_init(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); platform_device_register_full(&devinfo); } +static void __init imx51_init_late(void) +{ + mx51_neon_fixup(); + imx51_pm_init(); +} + static const char *imx51_dt_board_compat[] __initconst = { "fsl,imx51", NULL diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c index 9a066af3a205..62fb2a2d742b 100644 --- a/arch/arm/mach-imx/mach-imx53.c +++ b/arch/arm/mach-imx/mach-imx53.c @@ -24,13 +24,24 @@ #include "hardware.h" #include "mx53.h" +static void __init imx53_init_early(void) +{ + mxc_set_cpu_type(MXC_CPU_MX53); +} + static void __init imx53_dt_init(void) { mxc_arch_reset_init_dt(); + imx_src_init(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } +static void __init imx53_init_late(void) +{ + imx53_pm_init(); +} + static const char *imx53_dt_board_compat[] __initconst = { "fsl,imx53", NULL diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index 9e43e879bac5..768feded71b9 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -59,47 +59,3 @@ void __init mx53_map_io(void) { iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc)); } - -/* - * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by - * the Freescale marketing division. However this did not remove the - * hardware from the chip which still needs to be configured for proper - * IPU support. - */ -static void __init imx51_ipu_mipi_setup(void) -{ - void __iomem *hsc_addr; - hsc_addr = MX51_IO_ADDRESS(MX51_MIPI_HSC_BASE_ADDR); - - /* setup MIPI module to legacy mode */ - __raw_writel(0xf00, hsc_addr); - - /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */ - __raw_writel(__raw_readl(hsc_addr + 0x800) | 0x30ff, - hsc_addr + 0x800); -} - -void __init imx51_init_early(void) -{ - imx51_ipu_mipi_setup(); - mxc_set_cpu_type(MXC_CPU_MX51); - mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); - imx_src_init(); -} - -void __init imx53_init_early(void) -{ - mxc_set_cpu_type(MXC_CPU_MX53); - imx_src_init(); -} - -void __init imx51_init_late(void) -{ - mx51_neon_fixup(); - imx51_pm_init(); -} - -void __init imx53_init_late(void) -{ - imx53_pm_init(); -} |