diff options
| -rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index e7e9815ab985..e9b415f13059 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -384,6 +384,30 @@ MX6DL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000 >; }; + + pinctrl_ipu1_csi0_2: ipu1csi0grp-2 { /* parallel port 16-bit */ + fsl,pins = < + MX6DL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x80000000 + MX6DL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x80000000 + MX6DL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x80000000 + MX6DL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x80000000 + MX6DL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x80000000 + MX6DL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x80000000 + MX6DL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x80000000 + MX6DL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x80000000 + MX6DL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000 + MX6DL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000 + MX6DL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000 + MX6DL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000 + MX6DL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000 + MX6DL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000 + MX6DL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000 + MX6DL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000 + MX6DL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000 + MX6DL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000 + MX6DL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000 + >; + }; }; epdc { |