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-rw-r--r--drivers/scsi/stex.c41
1 files changed, 20 insertions, 21 deletions
diff --git a/drivers/scsi/stex.c b/drivers/scsi/stex.c
index bfd7983045b7..7edbcc9bc9d6 100644
--- a/drivers/scsi/stex.c
+++ b/drivers/scsi/stex.c
@@ -76,9 +76,10 @@ enum {
MU_STATE_STARTED = 4,
MU_STATE_RESETTING = 5,
- MU_MAX_DELAY_TIME = 240000,
+ MU_MAX_DELAY = 120,
MU_HANDSHAKE_SIGNATURE = 0x55aaaa55,
MU_HANDSHAKE_SIGNATURE_HALF = 0x5a5a0000,
+ MU_HARD_RESET_WAIT = 30000,
HMU_PARTNER_TYPE = 2,
/* firmware returned values */
@@ -910,23 +911,22 @@ static int stex_handshake(struct st_hba *hba)
struct handshake_frame *h;
dma_addr_t status_phys;
u32 data;
- int i;
+ unsigned long before;
if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
readl(base + IDBL);
- for (i = 0; readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE
- && i < MU_MAX_DELAY_TIME; i++) {
+ before = jiffies;
+ while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
+ if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
+ printk(KERN_ERR DRV_NAME
+ "(%s): no handshake signature\n",
+ pci_name(hba->pdev));
+ return -1;
+ }
rmb();
msleep(1);
}
-
- if (i == MU_MAX_DELAY_TIME) {
- printk(KERN_ERR DRV_NAME
- "(%s): no handshake signature\n",
- pci_name(hba->pdev));
- return -1;
- }
}
udelay(10);
@@ -965,19 +965,18 @@ static int stex_handshake(struct st_hba *hba)
readl(base + IDBL); /* flush */
udelay(10);
- for (i = 0; readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE
- && i < MU_MAX_DELAY_TIME; i++) {
+ before = jiffies;
+ while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
+ if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
+ printk(KERN_ERR DRV_NAME
+ "(%s): no signature after handshake frame\n",
+ pci_name(hba->pdev));
+ return -1;
+ }
rmb();
msleep(1);
}
- if (i == MU_MAX_DELAY_TIME) {
- printk(KERN_ERR DRV_NAME
- "(%s): no signature after handshake frame\n",
- pci_name(hba->pdev));
- return -1;
- }
-
writel(0, base + IMR0);
readl(base + IMR0);
writel(0, base + OMR0);
@@ -1059,7 +1058,7 @@ static void stex_hard_reset(struct st_hba *hba)
pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
- for (i = 0; i < MU_MAX_DELAY_TIME; i++) {
+ for (i = 0; i < MU_HARD_RESET_WAIT; i++) {
pci_read_config_word(hba->pdev, PCI_COMMAND, &pci_cmd);
if (pci_cmd != 0xffff && (pci_cmd & PCI_COMMAND_MASTER))
break;