diff options
| -rw-r--r-- | arch/arm/boot/dts/imx6dqscm-1gb-evb-fix-ldo.dts | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6dqscm-qwks-rev2.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 6 |
3 files changed, 10 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/imx6dqscm-1gb-evb-fix-ldo.dts b/arch/arm/boot/dts/imx6dqscm-1gb-evb-fix-ldo.dts index 04eacee73d52..1f6c0c3c40a8 100644 --- a/arch/arm/boot/dts/imx6dqscm-1gb-evb-fix-ldo.dts +++ b/arch/arm/boot/dts/imx6dqscm-1gb-evb-fix-ldo.dts @@ -41,8 +41,10 @@ }; &clks { - fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_MMDC_CH1_AXI>; - fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_MMDC_CH1_AXI>; + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_MMDC_CH1_AXI>, + <&clks IMX6QDL_CLK_MMDC_CH1_AXI>; }; &i2c2 { diff --git a/arch/arm/boot/dts/imx6dqscm-qwks-rev2.dtsi b/arch/arm/boot/dts/imx6dqscm-qwks-rev2.dtsi index b551162a715c..485f67e698db 100644 --- a/arch/arm/boot/dts/imx6dqscm-qwks-rev2.dtsi +++ b/arch/arm/boot/dts/imx6dqscm-qwks-rev2.dtsi @@ -138,8 +138,10 @@ }; &clks { - fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>; - fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>; + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_MMDC_CH1_AXI>, + <&clks IMX6QDL_CLK_MMDC_CH1_AXI>; }; &ecspi1 { diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index 8c6c05a4381f..941a9337db91 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -400,11 +400,9 @@ <&clks IMX6QDL_CLK_PLL4_POST_DIV>; assigned-clock-parents = <&clks IMX6QDL_CLK_LVDS2_IN>, <&clks IMX6QDL_PLL4_BYPASS_SRC>, - <&clks IMX6QDL_CLK_PLL3_USB_OTG>, - <&clks IMX6QDL_CLK_PLL3_USB_OTG>; + <&clks IMX6QDL_CLK_PLL2_PFD0_352M>, + <&clks IMX6QDL_CLK_PLL2_PFD0_352M>; assigned-clock-rates = <0>, <0>, <0>, <0>, <24576000>; - fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>; - fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>; }; &dcic1 { |