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-rw-r--r--arch/arm/boot/dts/Makefile6
-rw-r--r--arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts46
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-aster.dts6
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-aster.dtsi5
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts17
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts17
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-emmc-iris-v2.dts17
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-emmc-iris.dts17
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi185
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-eval-v3.dts2
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-iris-v2.dts14
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi18
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-iris.dts6
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-iris.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-lcdif.dtsi22
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi26
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts6
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-wifi-eval-v3.dts2
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-wifi-iris-v2.dts14
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-wifi-iris.dts6
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi26
-rw-r--r--arch/arm/boot/dts/imx6ull-colibri.dtsi52
-rw-r--r--arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi78
-rw-r--r--arch/arm/configs/apalis_imx6_defconfig4
-rw-r--r--arch/arm/configs/colibri-imx6ull_defconfig4
-rw-r--r--arch/arm/configs/colibri_imx6_defconfig4
-rw-r--r--arch/arm/configs/colibri_imx7_defconfig4
-rw-r--r--arch/arm64/boot/dts/freescale/Makefile13
-rw-r--r--arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi4
-rw-r--r--arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi3
-rw-r--r--arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi530
-rw-r--r--arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi210
-rw-r--r--arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts17
-rw-r--r--arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts16
-rw-r--r--arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts16
-rw-r--r--arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts16
-rw-r--r--arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi13
-rwxr-xr-xarch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi54
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts20
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.2.dts19
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-apalis.dtsi18
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-colibri-aster.dts47
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-colibri-dsihdmi-eval-v3.dts30
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts6
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris-v2.dts16
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts16
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-colibri-lvds-dual-channel.dts102
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-colibri-lvds-single-channel.dts101
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi1457
-rw-r--r--arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi46
-rw-r--r--arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi (renamed from arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi)2
-rw-r--r--arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi46
-rw-r--r--arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi201
-rw-r--r--arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi1427
-rw-r--r--arch/arm64/configs/toradex_defconfig8
56 files changed, 3244 insertions, 1822 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7498cde4899b..9d168005d52c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -650,9 +650,13 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ull-9x9-evk-btwifi.dtb \
imx6ull-9x9-evk-btwifi-oob.dtb \
imx6ull-colibri-aster.dtb \
+ imx6ull-colibri-emmc-aster.dtb \
+ imx6ull-colibri-emmc-eval-v3.dtb \
+ imx6ull-colibri-emmc-iris.dtb \
+ imx6ull-colibri-emmc-iris-v2.dtb \
+ imx6ull-colibri-eval-v3.dtb \
imx6ull-colibri-iris.dtb \
imx6ull-colibri-iris-v2.dtb \
- imx6ull-colibri-eval-v3.dtb \
imx6ull-colibri-wifi-aster.dtb \
imx6ull-colibri-wifi-iris.dtb \
imx6ull-colibri-wifi-iris-v2.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts b/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
index 4210db1b74ea..73b421ff1658 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Copyright 2018-2019 Toradex
+ * Copyright 2018-2021 Toradex
*/
/dts-v1/;
@@ -49,6 +49,27 @@
};
};
+&gpio2 {
+ /*
+ * uart_a_on_x13_enable turns the UART transceiver for UART_A on. If one
+ * wants to turn the transceiver off, that property has to be deleted
+ * and the gpio handled in userspace.
+ * The same applies to uart_b_c_on_x14_enable where the UART_B and
+ * UART_C transceiver is turned on.
+ */
+ uart_a_on_x13_enable {
+ gpio-hog;
+ gpios = <4 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */
+ output-high;
+ };
+
+ uart_b_c_on_x14_enable {
+ gpio-hog;
+ gpios = <8 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */
+ output-high;
+ };
+};
+
/*
* I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier
* board)
@@ -94,25 +115,16 @@
/* Colibri UART_A */
&uart1 {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl
- &pinctrl_uart1_forceoff>;
};
/* Colibri UART_B */
&uart2 {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2_dte &pinctrl_uart23_forceoff>;
};
/* Colibri UART_C */
&uart3 {
status = "okay";
- /*
- * Note that UART3 is on the same tranceiver as UART2 and this needs
- * to be enabled with the pinmuxing &pinctrl_uart23_forceoff
- */
};
&usbh1 {
@@ -184,20 +196,6 @@
};
};
- uart {
- pinctrl_uart1_forceoff: uart1_forceoff {
- fsl,pins = <
- MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
- >;
- };
-
- pinctrl_uart23_forceoff: uart23_forceoff {
- fsl,pins = <
- MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
- >;
- };
- };
-
usdhc {
pinctrl_enable_3v3_vmmc: enable_3v3_vmmc {
fsl,pins = <
diff --git a/arch/arm/boot/dts/imx6ull-colibri-aster.dts b/arch/arm/boot/dts/imx6ull-colibri-aster.dts
index c3adb82acf86..59652ef32bf2 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-aster.dts
+++ b/arch/arm/boot/dts/imx6ull-colibri-aster.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
- * Copyright 2017-2020 Toradex
+ * Copyright 2017-2021 Toradex
*/
/dts-v1/;
@@ -14,3 +14,7 @@
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
+
+&atmel_mxt_ts {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi
index 93367e89466e..dde3f38faa28 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi
@@ -107,11 +107,6 @@
};
};
-/* ATMEL TS connector */
-&atmel_mxt_ts {
- status = "okay";
-};
-
/* PWM <A> */
&pwm4 {
status = "okay";
diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts b/arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts
new file mode 100644
index 000000000000..96b5c676f98a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Copyright 2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx6ull-colibri-emmc-nonwifi.dtsi"
+#include "imx6ull-colibri-aster.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Aster";
+ compatible = "toradex,colibri-imx6ull-emmc-aster",
+ "toradex,colibri-imx6ull-emmc",
+ "toradex,colibri-imx6ull",
+ "fsl,imx6ull";
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts
new file mode 100644
index 000000000000..70104a6c5bac
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Toradex AG
+ */
+
+/dts-v1/;
+
+#include "imx6ull-colibri-emmc-nonwifi.dtsi"
+#include "imx6ull-colibri-eval-v3.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Evaluation Board V3";
+ compatible = "toradex,colibri-imx6ull-emmc-eval",
+ "toradex,colibri-imx6ull-emmc",
+ "toradex,colibri-imx6ull",
+ "fsl,imx6ull";
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-iris-v2.dts b/arch/arm/boot/dts/imx6ull-colibri-emmc-iris-v2.dts
new file mode 100644
index 000000000000..b0c458722875
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-iris-v2.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Toradex AG
+ */
+
+/dts-v1/;
+
+#include "imx6ull-colibri-emmc-nonwifi.dtsi"
+#include "imx6ull-colibri-iris-v2.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX6ULL 256MB on Colibri Iris V2";
+ compatible = "toradex,colibri-imx6ull-iris-v2",
+ "toradex,colibri-imx6ull-emmc",
+ "toradex,colibri-imx6ull",
+ "fsl,imx6ull";
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-iris.dts b/arch/arm/boot/dts/imx6ull-colibri-emmc-iris.dts
new file mode 100644
index 000000000000..793951d8441a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-iris.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Toradex AG
+ */
+
+/dts-v1/;
+
+#include "imx6ull-colibri-emmc-nonwifi.dtsi"
+#include "imx6ull-colibri-iris.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Iris";
+ compatible = "toradex,colibri-imx6ull-emmc-iris",
+ "toradex,colibri-imx6ull-emmc",
+ "toradex,colibri-imx6ull",
+ "fsl,imx6ull";
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi b/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi
new file mode 100644
index 000000000000..df055617e51f
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi
@@ -0,0 +1,185 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Toradex AG
+ */
+
+#include "imx6ull-colibri.dtsi"
+
+/ {
+ aliases {
+ mmc0 = &usdhc2; /* eMMC */
+ mmc1 = &usdhc1; /* MMC 4bit slot */
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>;
+ };
+};
+
+&gpio1 {
+ gpio-line-names = "SODIMM_8",
+ "SODIMM_6",
+ "SODIMM_129",
+ "SODIMM_89",
+ "SODIMM_19",
+ "SODIMM_21",
+ "UNUSABLE_SODIMM_180",
+ "UNUSABLE_SODIMM_184",
+ "SODIMM_4",
+ "SODIMM_2",
+ "SODIMM_106",
+ "SODIMM_71",
+ "SODIMM_23",
+ "SODIMM_31",
+ "SODIMM_99",
+ "SODIMM_102",
+ "SODIMM_33",
+ "SODIMM_35",
+ "SODIMM_25",
+ "SODIMM_27",
+ "SODIMM_36",
+ "SODIMM_38",
+ "SODIMM_32",
+ "SODIMM_34",
+ "SODIMM_135",
+ "SODIMM_77",
+ "SODIMM_100",
+ "SODIMM_186",
+ "SODIMM_196",
+ "SODIMM_194";
+};
+
+&gpio2 {
+ gpio-line-names = "SODIMM_55",
+ "SODIMM_63",
+ "SODIMM_178",
+ "SODIMM_188",
+ "SODIMM_73",
+ "SODIMM_30",
+ "SODIMM_67",
+ "SODIMM_104",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_190",
+ "SODIMM_47",
+ "SODIMM_192",
+ "SODIMM_49",
+ "SODIMM_51",
+ "SODIMM_53";
+};
+
+&gpio3 {
+ gpio-line-names = "SODIMM_56",
+ "SODIMM_44",
+ "SODIMM_68",
+ "SODIMM_82",
+ "",
+ "SODIMM_76",
+ "SODIMM_70",
+ "SODIMM_60",
+ "SODIMM_58",
+ "SODIMM_78",
+ "SODIMM_72",
+ "SODIMM_80",
+ "SODIMM_46",
+ "SODIMM_62",
+ "SODIMM_48",
+ "SODIMM_74",
+ "SODIMM_50",
+ "SODIMM_52",
+ "SODIMM_54",
+ "SODIMM_66",
+ "SODIMM_64",
+ "SODIMM_57",
+ "SODIMM_61",
+ "SODIMM_29",
+ "SODIMM_37",
+ "SODIMM_88",
+ "SODIMM_86",
+ "SODIMM_92",
+ "SODIMM_90";
+};
+
+&gpio4 {
+ gpio-line-names = "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_140",
+ "SODIMM_59",
+ "SODIMM_142",
+ "SODIMM_144",
+ "SODIMM_133",
+ "SODIMM_146",
+ "SODIMM_28",
+ "SODIMM_75",
+ "SODIMM_96",
+ "SODIMM_81",
+ "SODIMM_94",
+ "SODIMM_101",
+ "SODIMM_103",
+ "SODIMM_79",
+ "SODIMM_97",
+ "SODIMM_69",
+ "SODIMM_98",
+ "SODIMM_85",
+ "SODIMM_65";
+};
+
+&gpio5 {
+ gpio-line-names = "SODIMM_43",
+ "SODIMM_45",
+ "SODIMM_137",
+ "SODIMM_95",
+ "SODIMM_107",
+ "SODIMM_131",
+ "SODIMM_93",
+ "",
+ "SODIMM_138",
+ "",
+ "SODIMM_105",
+ "SODIMM_127";
+};
+
+&gpmi {
+ status = "disabled";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
+ &pinctrl_gpio4 &pinctrl_gpio6 &pinctrl_gpio7
+ &pinctrl_gpmi_gpio>;
+};
+
+&iomuxc_snvs {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>;
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2emmc>;
+ assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
+ assigned-clock-rates = <0>, <198000000>;
+ bus-width = <8>;
+ keep-power-in-suspend;
+ no-1-8-v;
+ non-removable;
+ vmmc-supply = <&reg_module_3v3>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dts
index 671109d57e1c..4016fbb53bad 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * Copyright 2018 Toradex AG
+ * Copyright 2018-2021 Toradex
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
index 99f9b1fb15c5..a3debdabdbca 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
@@ -123,8 +123,8 @@
&atmel_mxt_ts {
pinctrl-0 = <&pinctrl_atmel_adap>;
interrupt-parent = <&gpio4>;
- interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
- reset-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
+ interrupts = <16 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28, INT */
+ reset-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* SODIMM 30, RST */
status = "disabled";
};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dts b/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dts
index fc93eb3b16ee..1906b7dffef7 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dts
+++ b/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * Copyright 2018 Toradex AG
+ * Copyright 2018-2021 Toradex
*/
/dts-v1/;
@@ -14,3 +14,15 @@
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
+
+&atmel_mxt_ts {
+ status = "okay";
+};
+
+&gpio1 {
+ lvds_tx_on {
+ gpio-hog;
+ gpios = <14 GPIO_ACTIVE_HIGH>;
+ output-high;
+ };
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi b/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi
index f91793344d0f..fa734dac574c 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi
@@ -113,11 +113,6 @@
status = "okay";
};
-/* Atmel TS connector */
-&atmel_mxt_ts {
- status = "okay";
-};
-
/* Colibri UART_A */
&uart1 {
status = "okay";
@@ -178,19 +173,6 @@
};
&gpio1 {
- /*
- * lvds_tx_on turns the LVDS transceiver on. If one wants to turn the
- * transceiver off, that property has to be deleted and the gpio handled
- * in userspace.
- * The same applies to uart25_tx_on and uart1_tx_on, where the UART
- * transceiver is turned on.
- */
- lvds_tx_on {
- gpio-hog;
- gpios = <14 0>;
- output-high;
- };
-
uart25_tx_on {
gpio-hog;
gpios = <15 0>;
diff --git a/arch/arm/boot/dts/imx6ull-colibri-iris.dts b/arch/arm/boot/dts/imx6ull-colibri-iris.dts
index e3b8877613a5..0eb38ecc8f21 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-iris.dts
+++ b/arch/arm/boot/dts/imx6ull-colibri-iris.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * Copyright 2018 Toradex AG
+ * Copyright 2018-2021 Toradex
*/
/dts-v1/;
@@ -14,3 +14,7 @@
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
+
+&atmel_mxt_ts {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-iris.dtsi b/arch/arm/boot/dts/imx6ull-colibri-iris.dtsi
index 6a80c16f06e4..c252cb4cfe39 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-iris.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-iris.dtsi
@@ -87,8 +87,8 @@
&atmel_mxt_ts {
pinctrl-0 = <&pinctrl_atmel_adap>;
interrupt-parent = <&gpio4>;
- interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
- reset-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
+ interrupts = <16 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28, INT */
+ reset-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* SODIMM 30, RST */
status = "disabled";
};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-lcdif.dtsi b/arch/arm/boot/dts/imx6ull-colibri-lcdif.dtsi
index 569d1b844620..6c2ea9ad8c37 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-lcdif.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-lcdif.dtsi
@@ -93,7 +93,6 @@
vfront-porch = <11>;
hsync-len = <96>;
vsync-len = <2>;
-
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
@@ -111,7 +110,6 @@
vfront-porch = <10>;
hsync-len = <128>;
vsync-len = <2>;
-
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
@@ -128,7 +126,6 @@
vfront-porch = <10>;
hsync-len = <128>;
vsync-len = <2>;
-
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
@@ -145,7 +142,6 @@
vfront-porch = <1>;
hsync-len = <128>;
vsync-len = <4>;
-
de-active = <1>;
hsync-active = <1>;
vsync-active = <1>;
@@ -162,7 +158,6 @@
vfront-porch = <20>;
hsync-len = <5>;
vsync-len = <5>;
-
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
@@ -179,7 +174,22 @@
vfront-porch = <3>;
hsync-len = <136>;
vsync-len = <6>;
-
+ de-active = <1>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ pixelclk-active = <0>;
+ };
+ /* WXGA Timing, LT170410 display 10" */
+ timing_wxga: 1280x800 {
+ clock-frequency = <68930000>;
+ hactive = <1280>;
+ vactive = <800>;
+ hback-porch = <64>;
+ hfront-porch = <64>;
+ vback-porch = <5>;
+ vfront-porch = <5>;
+ hsync-len = <40>;
+ vsync-len = <6>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
diff --git a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
index 60f169227ad9..a324b4fba8ca 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * Copyright 2018 Toradex AG
+ * Copyright 2018-2021 Toradex
*/
#include "imx6ull-colibri.dtsi"
@@ -12,6 +12,14 @@
};
};
+&ad7879_ts {
+ status = "okay";
+};
+
+&backlight {
+ status = "okay";
+};
+
&gpio1 {
gpio-line-names = "SODIMM_8",
"SODIMM_6",
@@ -149,6 +157,14 @@
"SODIMM_127";
};
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
@@ -159,3 +175,11 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>;
};
+
+&lcdif {
+ status = "okay";
+};
+
+&pwm4 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts b/arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts
index d23fc5de772c..f1b4942564f5 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts
+++ b/arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
- * Copyright 2017-2020 Toradex
+ * Copyright 2017-2021 Toradex
*/
/dts-v1/;
@@ -14,3 +14,7 @@
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
+
+&atmel_mxt_ts {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi-eval-v3.dts b/arch/arm/boot/dts/imx6ull-colibri-wifi-eval-v3.dts
index df72ce1ae2cb..6c5f44ec6d51 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-wifi-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6ull-colibri-wifi-eval-v3.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * Copyright 2018 Toradex AG
+ * Copyright 2018-2021 Toradex
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi-iris-v2.dts b/arch/arm/boot/dts/imx6ull-colibri-wifi-iris-v2.dts
index 202b50fc2cfa..95e28f5aac6d 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-wifi-iris-v2.dts
+++ b/arch/arm/boot/dts/imx6ull-colibri-wifi-iris-v2.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * Copyright 2018 Toradex AG
+ * Copyright 2018-2021 Toradex
*/
/dts-v1/;
@@ -14,3 +14,15 @@
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
+
+&atmel_mxt_ts {
+ status = "okay";
+};
+
+&gpio1 {
+ lvds_tx_on {
+ gpio-hog;
+ gpios = <14 GPIO_ACTIVE_HIGH>;
+ output-high;
+ };
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi-iris.dts b/arch/arm/boot/dts/imx6ull-colibri-wifi-iris.dts
index 966d02a07b1c..15d893088616 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-wifi-iris.dts
+++ b/arch/arm/boot/dts/imx6ull-colibri-wifi-iris.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * Copyright 2018 Toradex AG
+ * Copyright 2018-2021 Toradex
*/
/dts-v1/;
@@ -14,3 +14,7 @@
"toradex,colibri-imx6ull",
"fsl,imx6ull";
};
+
+&atmel_mxt_ts {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
index 5619f40e49cb..237757d7df8b 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * Copyright 2018 Toradex AG
+ * Copyright 2018-2021 Toradex
*/
#include "imx6ull-colibri.dtsi"
@@ -19,6 +19,14 @@
};
};
+&ad7879_ts {
+ status = "okay";
+};
+
+&backlight {
+ status = "okay";
+};
+
&gpio1 {
gpio-line-names = "SODIMM_8",
"SODIMM_6",
@@ -155,6 +163,14 @@
"SODIMM_105";
};
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
@@ -167,6 +183,14 @@
pinctrl-0 = <&pinctrl_snvs_gpio1>;
};
+&lcdif {
+ status = "okay";
+};
+
+&pwm4 {
+ status = "okay";
+};
+
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index d2069a9ab80b..e5edf740f5c7 100644
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
- * Copyright 2018 Toradex AG
+ * Copyright 2018-2021 Toradex AG
*/
#include "imx6ull.dtsi"
@@ -94,9 +94,6 @@
pinctrl-0 = <&pinctrl_adc1>;
};
-&cpu0 {
- dc-supply = <&reg_soc_in>;
-};
/* Colibri SPI */
&ecspi1 {
@@ -157,7 +154,7 @@
pinctrl-1 = <&pinctrl_i2c1_gpio>;
sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- status = "okay";
+ status = "disabled";
/* Atmel maxtouch controller */
atmel_mxt_ts: touchscreen@4a {
@@ -191,9 +188,9 @@
pinctrl-1 = <&pinctrl_i2c2_gpio>;
sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- status = "okay";
+ status = "disabled";
- ad7879@2c {
+ ad7879_ts: touchscreen@2c {
compatible = "adi,ad7879-1";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_snvs_ad7879_int>;
@@ -207,21 +204,10 @@
adi,median-filter-size = /bits/ 8 <2>;
adi,averaging = /bits/ 8 <1>;
adi,conversion-interval = /bits/ 8 <255>;
+ status = "disabled";
};
};
-&backlight {
- status = "okay";
-};
-
-&lcdif {
- status = "okay";
-};
-
-&pwm4 {
- status = "okay";
-};
-
&pwm5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm5>;
@@ -445,6 +431,19 @@
>;
};
+ /*
+ * With an eMMC instead of a raw NAND device the following pins
+ * are available at SODIMM pins
+ */
+ pinctrl_gpmi_gpio: gpmi-gpio-grp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x10b0 /* SODIMM 140 */
+ MX6UL_PAD_NAND_CE0_B__GPIO4_IO13 0x10b0 /* SODIMM 144 */
+ MX6UL_PAD_NAND_CLE__GPIO4_IO15 0x10b0 /* SODIMM 146 */
+ MX6UL_PAD_NAND_READY_B__GPIO4_IO12 0x10b0 /* SODIMM 142 */
+ >;
+ };
+
pinctrl_gpmi_nand: gpmi-nand-grp {
fsl,pins = <
MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9
@@ -595,6 +594,21 @@
>;
};
+ pinctrl_usdhc2emmc: usdhc2emmcgrp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+ MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
+ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
+ MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
+ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
+ >;
+ };
+
pinctrl_wdog: wdog-grp {
fsl,pins = <
MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
diff --git a/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi
index 6e43dba34544..f2ebe9f53f91 100644
--- a/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
- * Copyright 2018-2020 Toradex
+ * Copyright 2018-2021 Toradex
*/
#include <dt-bindings/input/input.h>
@@ -10,6 +10,14 @@
bootargs = "console=ttymxc0,115200";
};
+ extcon_usbc_det: usbc_det {
+ compatible = "linux,extcon-usb-gpio";
+ debounce = <25>;
+ id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbc_det>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
@@ -34,12 +42,11 @@
enable-active-high;
};
- extcon_usbc_det: usbc_det {
- compatible = "linux,extcon-usb-gpio";
- debounce = <25>;
- id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbc_det>;
+ reg_5v0: regulator-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
};
reg_usbh_vbus: regulator-usbh-vbus {
@@ -52,13 +59,6 @@
gpio = <&gpio4 7 GPIO_ACTIVE_LOW>;
vin-supply = <&reg_5v0>;
};
-
- reg_5v0: regulator-5v0 {
- compatible = "regulator-fixed";
- regulator-name = "5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
};
&adc1 {
@@ -77,6 +77,29 @@
status = "okay";
};
+&gpio2 {
+ /*
+ * uart_b_c_on_x14_enable turns the UART transceiver for UART_B and
+ * UART_C on. If one wants to turn the transceiver off, that property
+ * has to be deleted and the gpio handled in userspace.
+ * The same applies to uart_a_on_x13_enable where the UART_A
+ * transceiver is turned on.
+ */
+ uart_b_c_on_x14_enable {
+ gpio-hog;
+ gpios = <27 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */
+ output-high;
+ };
+};
+
+&gpio5 {
+ uart_a_on_x13_enable {
+ gpio-hog;
+ gpios = <17 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */
+ output-high;
+ };
+};
+
&i2c4 {
status = "okay";
@@ -116,34 +139,11 @@
};
&usbotg1 {
- extcon = <&extcon_usbc_det>, <&extcon_usbc_det>;
+ extcon = <&extcon_usbc_det>, <&extcon_usbc_det>;
vbus-supply = <&reg_usbh_vbus>;
status = "okay";
};
-&gpio2 {
- /*
- * uart25 turns the UART transceiver for UART2 and 5 on. If one wants to
- * turn the transceiver off, that property has to be deleted and the
- * gpio handled in userspace.
- * The same applies to uart1_tx_on and lvds_tx_on, where the UART / LVDS
- * transceiver is turned on.
- */
- uart25_tx_on {
- gpio-hog;
- gpios = <27 0>; /* SODIMM 104 */
- output-high;
- };
-};
-
-&gpio5 {
- uart1_tx_on {
- gpio-hog;
- gpios = <17 0>; /* SODIMM 102 */
- output-high;
- };
-};
-
/* The define SD_1_8 allows to use the SD interface at a higher speed mode
* if the card supports it. For this the signaling voltage is switched from
* 3.3V to 1.8V under the usdhc1's drivers control.
@@ -196,6 +196,4 @@
MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 /* CD */
>;
};
-
};
-
diff --git a/arch/arm/configs/apalis_imx6_defconfig b/arch/arm/configs/apalis_imx6_defconfig
index fc80c93e18ce..58d609814709 100644
--- a/arch/arm/configs/apalis_imx6_defconfig
+++ b/arch/arm/configs/apalis_imx6_defconfig
@@ -263,8 +263,8 @@ CONFIG_SPI=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=y
-CONFIG_PPS_CLIENT_LDISC=y
-CONFIG_PPS_CLIENT_GPIO=y
+CONFIG_PPS_CLIENT_LDISC=m
+CONFIG_PPS_CLIENT_GPIO=m
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
diff --git a/arch/arm/configs/colibri-imx6ull_defconfig b/arch/arm/configs/colibri-imx6ull_defconfig
index fa44401c12b3..82c896c9e6b7 100644
--- a/arch/arm/configs/colibri-imx6ull_defconfig
+++ b/arch/arm/configs/colibri-imx6ull_defconfig
@@ -258,8 +258,8 @@ CONFIG_SPI=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=y
-CONFIG_PPS_CLIENT_LDISC=y
-CONFIG_PPS_CLIENT_GPIO=y
+CONFIG_PPS_CLIENT_LDISC=m
+CONFIG_PPS_CLIENT_GPIO=m
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
diff --git a/arch/arm/configs/colibri_imx6_defconfig b/arch/arm/configs/colibri_imx6_defconfig
index c43a5db06d34..307fa80a4ffb 100644
--- a/arch/arm/configs/colibri_imx6_defconfig
+++ b/arch/arm/configs/colibri_imx6_defconfig
@@ -257,8 +257,8 @@ CONFIG_SPI=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=y
-CONFIG_PPS_CLIENT_LDISC=y
-CONFIG_PPS_CLIENT_GPIO=y
+CONFIG_PPS_CLIENT_LDISC=m
+CONFIG_PPS_CLIENT_GPIO=m
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
diff --git a/arch/arm/configs/colibri_imx7_defconfig b/arch/arm/configs/colibri_imx7_defconfig
index cd9fca64ddd4..7bcf3dd5b5a5 100644
--- a/arch/arm/configs/colibri_imx7_defconfig
+++ b/arch/arm/configs/colibri_imx7_defconfig
@@ -255,8 +255,8 @@ CONFIG_SPI_NXP_FLEXSPI=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=y
-CONFIG_PPS_CLIENT_LDISC=y
-CONFIG_PPS_CLIENT_GPIO=y
+CONFIG_PPS_CLIENT_LDISC=m
+CONFIG_PPS_CLIENT_GPIO=m
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 51a1301f3254..6c7b27f6b7c9 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -119,8 +119,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb imx8qm-mek-ov5640.dtb \
imx8qm-apalis-ixora-v1.1.dtb \
imx8qm-apalis-v1.1-eval.dtb \
imx8qm-apalis-v1.1-ixora-v1.1.dtb \
+ imx8qm-apalis-v1.1-ixora-v1.2.dtb \
imx8qp-apalis-v1.1-eval.dtb \
- imx8qp-apalis-v1.1-ixora-v1.1.dtb
+ imx8qp-apalis-v1.1-ixora-v1.1.dtb \
+ imx8qp-apalis-v1.1-ixora-v1.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek-dom0.dtb imx8qm-mek-domu.dtb \
imx8qm-mek-root.dtb imx8qm-mek-inmate.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
@@ -169,8 +171,15 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb imx8qxp-mek-dsp.dtb imx8qxp-mek-ov5640
imx8qxp-17x17-val.dtb imx8dx-lpddr4-val.dtb imx8dx-17x17-val.dtb \
imx8qxp-lpddr4-val-mlb.dtb imx8qxp-mek-vop.dtb \
imx8qxp-colibri-aster.dtb \
- imx8qxp-colibri-dsihdmi-eval-v3.dtb \
+ imx8dx-colibri-aster.dtb \
imx8qxp-colibri-eval-v3.dtb \
+ imx8dx-colibri-eval-v3.dtb \
+ imx8qxp-colibri-iris.dtb \
+ imx8dx-colibri-iris.dtb \
+ imx8dx-colibri-iris-v2.dtb \
+ imx8qxp-colibri-iris-v2.dtb \
+ imx8qxp-colibri-lvds-single-channel.dtb \
+ imx8qxp-colibri-lvds-dual-channel.dtb \
imx8qxp-apalis-eval.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek-dom0.dtb imx8qxp-mek-root.dtb \
imx8qxp-mek-inmate.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi
index 4b6d0e846b32..0a4fe3898993 100644
--- a/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi
@@ -361,7 +361,3 @@
status = "okay";
};
-&wakeup_key {
- status = "okay";
-};
-
diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi
index f20fad2a6f40..53f56dc8f536 100644
--- a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi
@@ -414,6 +414,3 @@
status = "okay";
};
-&wakeup_key {
- status = "okay";
-};
diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi
new file mode 100644
index 000000000000..2ea93a99074e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi
@@ -0,0 +1,530 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2019-2021 Toradex
+ */
+
+/ {
+ aliases {
+ rtc0 = &rtc_i2c;
+ rtc1 = &rtc;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_leds_ixora>;
+
+ /* MXM3_188 */
+ led4-green {
+ label = "LED_4_GREEN";
+ gpios = <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>;
+ };
+ /* MXM3_178 */
+ led4-red {
+ label = "LED_4_RED";
+ gpios = <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>;
+ };
+ /* MXM3_152 */
+ led5-green {
+ label = "LED_5_GREEN";
+ gpios = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>;
+ };
+ /* MXM3_156 */
+ led5-red {
+ label = "LED_5_RED";
+ gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_usb_host_vbus: regulator-usb-host-vbus {
+ regulator-name = "VCC_USBH(2|4)";
+ };
+
+ reg_3v3_vmmc: regulator-3v3-vmmc {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enable_3v3_vmmc>;
+ regulator-name = "3v3_vmmc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+
+ /* MMC1_PWR_CTRL */
+ gpio = <&lsio_gpio5 19 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_can1_supply: regulator-can1-supply {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enable_can1_power>;
+ regulator-name = "can1_supply";
+ gpio = <&lsio_gpio5 22 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_can2_supply: regulator-can2-supply {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sata1_act>;
+ regulator-name = "can2_supply";
+ gpio = <&lsio_gpio2 8 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+};
+
+&adc0 {
+ status = "okay";
+};
+
+&adc1 {
+ status = "okay";
+};
+
+&amix {
+ status = "okay";
+};
+
+&asrc0 {
+ status = "okay";
+};
+
+&backlight {
+ default-brightness-level = <4>;
+ brightness-levels = <0 45 63 88 119 158 203 255>;
+ pwms = <&pwm_lvds1 0 6666667 PWM_POLARITY_INVERTED>;
+ status = "okay";
+};
+
+&dc0_dpr1_channel1 {
+ status = "okay";
+};
+
+&dc0_dpr1_channel2 {
+ status = "okay";
+};
+
+&dc0_dpr1_channel3 {
+ status = "okay";
+};
+
+&dc0_dpr2_channel1 {
+ status = "okay";
+};
+
+&dc0_dpr2_channel2 {
+ status = "okay";
+};
+
+&dc0_dpr2_channel3 {
+ status = "okay";
+};
+
+&dc0_pc {
+ status = "okay";
+};
+
+&dc0_prg1 {
+ status = "okay";
+};
+
+&dc0_prg2 {
+ status = "okay";
+};
+
+&dc0_prg3 {
+ status = "okay";
+};
+
+&dc0_prg4 {
+ status = "okay";
+};
+
+&dc0_prg5 {
+ status = "okay";
+};
+
+&dc0_prg6 {
+ status = "okay";
+};
+
+&dc0_prg7 {
+ status = "okay";
+};
+
+&dc0_prg8 {
+ status = "okay";
+};
+
+&dc0_prg9 {
+ status = "okay";
+};
+
+&dc1_dpr1_channel1 {
+ status = "okay";
+};
+
+&dc1_dpr1_channel2 {
+ status = "okay";
+};
+
+&dc1_dpr1_channel3 {
+ status = "okay";
+};
+
+&dc1_dpr2_channel1 {
+ status = "okay";
+};
+
+&dc1_dpr2_channel2 {
+ status = "okay";
+};
+
+&dc1_dpr2_channel3 {
+ status = "okay";
+};
+
+&dc1_pc {
+ status = "okay";
+};
+
+&dc1_prg1 {
+ status = "okay";
+};
+
+&dc1_prg2 {
+ status = "okay";
+};
+
+&dc1_prg3 {
+ status = "okay";
+};
+
+&dc1_prg4 {
+ status = "okay";
+};
+
+&dc1_prg5 {
+ status = "okay";
+};
+
+&dc1_prg6 {
+ status = "okay";
+};
+
+&dc1_prg7 {
+ status = "okay";
+};
+
+&dc1_prg8 {
+ status = "okay";
+};
+
+&dc1_prg9 {
+ status = "okay";
+};
+
+&dpu1 {
+ status = "okay";
+};
+
+&dpu2 {
+ status = "okay";
+};
+
+&fec1 {
+ status = "okay";
+};
+
+&gpu_3d0{
+ status = "okay";
+};
+
+&gpu_3d1{
+ status = "okay";
+};
+
+/* Apalis I2C1 */
+&i2c2 {
+ status = "okay";
+
+ atmel_mxt_ts: atmel_mxt_ts@4a {
+ compatible = "atmel,maxtouch";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpio6>;
+ reg = <0x4a>;
+ interrupt-parent = <&lsio_gpio4>;
+ interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */
+ reset-gpios = <&lsio_gpio4 2 GPIO_ACTIVE_HIGH>; /* Apalis GPIO6 */
+ status = "disabled";
+ };
+
+ /* M41T0M6 real time clock on carrier board */
+ rtc_i2c: rtc@68 {
+ compatible = "st,m41t0";
+ reg = <0x68>;
+ };
+
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+/* Apalis I2C3 (CAM) */
+&i2c3 {
+ status = "okay";
+};
+
+&imx8_gpu_ss {
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>,
+ <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>,
+ <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>,
+ <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>,
+ <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>,
+ <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>,
+ <&pinctrl_qspi1a_gpios>, <&pinctrl_sim0_gpios>,
+ <&pinctrl_usdhc1_gpios>, <&pinctrl_uart24_forceoff>;
+
+ pinctrl_leds_ixora: ledsixoragrp {
+ fsl,pins = <
+ IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 0x41 /* LED_4_GREEN */
+ IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 0x41 /* LED_4_RED */
+ IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 0x41 /* LED_5_GREEN */
+ IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 0x41 /* LED_5_RED */
+ >;
+ };
+
+ pinctrl_uart24_forceoff: uart24forceoffgrp {
+ fsl,pins = <
+ IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 0x21
+ >;
+ };
+
+ /* Apalis MMC1_CD# */
+ pinctrl_mmc1_cd_4bit: mmc1cdgrp_4bit {
+ fsl,pins = <
+ IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021
+ >;
+ };
+
+ /* Apalis MMC1 */
+ pinctrl_usdhc2_4bit: usdhc2grp_4bit {
+ fsl,pins = <
+ IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041
+ IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021
+ IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021
+ IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021
+ IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021
+ IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021
+
+ /* On-module PMIC use */
+ IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021
+ >;
+ };
+
+ /* Apalis MMC1_CD# */
+ pinctrl_mmc1_cd_4bit_sleep: mmc1cdgrp_4bit {
+ fsl,pins = <
+ IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x04000041
+ >;
+ };
+
+ /* Apalis MMC1 */
+ pinctrl_usdhc2_4bit_sleep: usdhc2grp_4bit {
+ fsl,pins = <
+ IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x04000041
+ IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x04000041
+ IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x04000041
+ IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x04000041
+ IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x04000041
+ IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x04000041
+
+ /* On-module PMIC use */
+ IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x04000041
+ >;
+ };
+
+ /* PMIC MMC1 power-switch */
+ pinctrl_enable_3v3_vmmc: enable_3v3_vmmc {
+ fsl,pins = <
+ IMX8QM_USDHC1_DATA4_LSIO_GPIO5_IO19 0x00000021 /* MXM3_148, PMIC */
+ >;
+ };
+
+ /* FlexCAN PMIC */
+ pinctrl_enable_can1_power: enable_can1_power {
+ fsl,pins = <
+ IMX8QM_USDHC1_DATA7_LSIO_GPIO5_IO22 0x00000021 /* MXM3_158, PMIC */
+ >;
+ };
+
+};
+
+&irqsteer_csi0 {
+ status = "okay";
+};
+
+&irqsteer_csi1 {
+ status = "okay";
+};
+
+&lsio_gpio5 {
+ ngpios = <32>;
+ gpio-line-names = "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03",
+ "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07",
+ "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11",
+ "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15",
+ "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19",
+ "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23",
+ "gpio5-24", "UART24-FORCEOFF", "gpio5-26",
+ "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30",
+ "gpio5-31";
+};
+
+/* Apalis SPI1 */
+&lpspi0 {
+ status = "okay";
+};
+
+/* Apalis SPI2 */
+&lpspi2 {
+ status = "okay";
+};
+
+/* Apalis UART3 */
+&lpuart0 {
+ status = "okay";
+};
+
+/* Apalis UART1 */
+&lpuart1 {
+ status = "okay";
+};
+
+/* Apalis UART4 */
+&lpuart2 {
+ status = "okay";
+};
+
+/* Apalis UART2 */
+&lpuart3 {
+ status = "okay";
+};
+
+/* Apalis PCIE1 */
+&pciea{
+ status = "okay";
+};
+
+/* Apalis PWM3, MXM3 pin 6 */
+&pwm0 {
+ status = "okay";
+};
+
+/* Apalis PWM4, MXM3 pin 8 */
+&pwm1 {
+ status = "okay";
+};
+
+/* Apalis PWM1, MXM3 pin 2 */
+&pwm2 {
+ status = "okay";
+};
+
+/* Apalis PWM2, MXM3 pin 4 */
+&pwm3 {
+ status = "okay";
+};
+
+&pwm_lvds1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm_bkl>;
+ status = "okay";
+};
+
+&sai1 {
+ status = "okay";
+};
+
+&sai5 {
+ status = "okay";
+};
+
+&sai5_lpcg {
+ status = "okay";
+};
+
+/* Apalis SATA1 */
+&sata {
+ status = "okay";
+};
+
+/* Apalis SPDIF1 */
+&spdif0 {
+ status = "okay";
+};
+
+&spdif1 {
+ status = "okay";
+};
+
+&spdif1_lpcg {
+ status = "okay";
+};
+
+/* Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */
+&usbh1 {
+ vbus-supply = <&reg_usb_host_vbus>;
+ status = "okay";
+};
+
+/* Apalis USBO1 */
+&usbotg1 {
+ status = "okay";
+};
+
+/* Apalis USBH4 SuperSpeed */
+&usbotg3 {
+ dr_mode = "host";
+ vbus-supply = <&reg_usb_host_vbus>;
+ status = "okay";
+};
+
+/* Apalis MMC1 */
+&usdhc2 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd_4bit>;
+ pinctrl-1 = <&pinctrl_usdhc2_4bit_sleep &pinctrl_mmc1_cd_4bit_sleep>;
+ bus-width = <4>;
+ cd-gpios = <&lsio_gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */
+ cap-power-off-card;
+ vmmc-supply = <&reg_3v3_vmmc>;
+ status = "okay";
+};
+
+&vpu_decoder {
+ status = "okay";
+};
+
+&vpu_encoder {
+ status = "okay";
+};
+
+/* Apalis CAN1 */
+&flexcan1 {
+ xceiver-supply = <&reg_can1_supply>;
+ status = "okay";
+};
+
+/* Apalis CAN2 */
+&flexcan2 {
+ xceiver-supply = <&reg_can2_supply>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi
index bc35996ff744..7befeac7a834 100644
--- a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi
@@ -27,22 +27,6 @@
3000 1>;
};
- /* Apalis WAKE1_MICO */
- wakeup_key: gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_keys>;
- status = "disabled";
-
- wakeup-key {
- label = "Wake-Up";
- gpios = <&lsio_gpio2 20 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_WAKEUP>;
- debounce-interval = <10>;
- wakeup-source;
- };
- };
-
panel_lvds: panel-lvds {
compatible = "panel-lvds";
backlight = <&backlight>;
@@ -71,23 +55,6 @@
enable-gpios = <&lsio_gpio4 11 GPIO_ACTIVE_HIGH>;
};
- /*
- * Power management bus used to control LDO1OUT of the
- * second PMIC PF8100. This is used for controlling voltage levels of
- * typespecific RGMII signals and Apalis UART2_RTS UART2_CTS.
- *
- * IMX_SC_R_BOARD_R1 for 3.3V
- * IMX_SC_R_BOARD_R2 for 1.8V
- * IMX_SC_R_BOARD_R3 for 2.5V
- * Note that for 2.5V operation the pad muxing needs to be changed,
- * compare with PSW_OVR field of IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD.
- *
- * those power domains are mutually exclusive.
- */
- pmbus_external_rgmii: pmbusextrgmii {
- compatible = "simple-pm-bus";
- power-domains = <&pd IMX_SC_R_BOARD_R1>;
- };
pcie_wifi_refclk: wifi-clock-generator {
compatible = "fixed-clock";
@@ -104,63 +71,113 @@
enable-gpios = <&lsio_gpio2 11 GPIO_ACTIVE_HIGH>;
};
- reg_module_3v3: regulator-module-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "+V3.3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
- reg_module_3v3_avdd: regulator-module-3v3-avdd {
- compatible = "regulator-fixed";
- regulator-name = "+V3.3_AUDIO";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
+ /*
+ * Power management bus used to control LDO1OUT of the
+ * second PMIC PF8100. This is used for controlling voltage levels of
+ * typespecific RGMII signals and Apalis UART2_RTS UART2_CTS.
+ *
+ * IMX_SC_R_BOARD_R1 for 3.3V
+ * IMX_SC_R_BOARD_R2 for 1.8V
+ * IMX_SC_R_BOARD_R3 for 2.5V
+ * Note that for 2.5V operation the pad muxing needs to be changed,
+ * compare with PSW_OVR field of IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD.
+ *
+ * those power domains are mutually exclusive.
+ */
+ reg_ext_rgmii: regulator-ext-rgmii {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_EXT_RGMII (LDO1)";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ power-domains = <&pd IMX_SC_R_BOARD_R1>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
- reg_module_wifi: regulator-module-wifi {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wifi_pdn>;
- regulator-name = "wifi_pwrdn_fake_regulator";
- regulator-settling-time-us = <100>;
+ /*
+ * Power management bus used for powering down phy in suspend
+ *
+ * Power management bus used to control LDO4OUT of the
+ * first PMIC PF8100 from SCFW using IMX_SC_R_BOARD_R0 (+3.3V_ETH)
+ */
+ reg_fec_supply: regulator-fec-supply {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3_ETH (LDO4)";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ power-domains = <&pd IMX_SC_R_BOARD_R0>;
- regulator-state-mem {
- regulator-off-in-suspend;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
};
- };
- reg_pcie_switch: regulator-pcie-switch {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio7>;
- enable-active-high;
- gpio = <&lsio_gpio3 26 GPIO_ACTIVE_HIGH>;
- regulator-name = "pcie_switch";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- startup-delay-us = <100000>;
- };
+ reg_module_3v3: regulator-module-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
- reg_usb_host_vbus: regulator-usb-host-vbus {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh_en>;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- /* Apalis USBH_EN */
- gpio = <&lsio_gpio4 4 GPIO_ACTIVE_HIGH>;
- regulator-always-on;
+ reg_module_3v3_avdd: regulator-module-3v3-avdd {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3_AUDIO";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_module_wifi: regulator-module-wifi {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wifi_pdn>;
+ regulator-name = "wifi_pwrdn_fake_regulator";
+ regulator-settling-time-us = <100>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ reg_pcie_switch: regulator-pcie-switch {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio7>;
+ enable-active-high;
+ gpio = <&lsio_gpio3 26 GPIO_ACTIVE_HIGH>;
+ regulator-name = "pcie_switch";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ startup-delay-us = <100000>;
+ };
+
+ reg_vref_1v8: regulator-vref-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "+V1.8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
};
- reg_vref_1v8: regulator-vref-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "+V1.8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ reg_usb_host_vbus: regulator-usb-host-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh_en>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+
+ /* Apalis USBH_EN */
+ gpio = <&lsio_gpio4 4 GPIO_ACTIVE_HIGH>;
+ regulator-always-on;
};
reserved-memory {
@@ -297,6 +314,8 @@
pinctrl-1 = <&pinctrl_fec1_sleep>;
fsl,magic-packet;
fsl,mii-exclusive;
+
+ phy-supply = <&reg_fec_supply>;
phy-handle = <&ethphy0>;
phy-mode = "rgmii-id";
phy-reset-duration = <10>;
@@ -311,7 +330,6 @@
interrupt-parent = <&lsio_gpio1>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <0>;
- power-domains = <&pd IMX_SC_R_BOARD_R0>;
reg = <7>;
};
};
@@ -335,6 +353,16 @@
/* xceiver-supply = <&reg_can_stby>; */
};
+/* Apalis CAN3 (optional) */
+&flexcan3 {
+ /* define the following property to disable CAN-FD mode */
+ /* disable-fd-mode; */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan3>;
+ /* xceiver-supply = <&reg_can_stby>; */
+};
+
+
/* Apalis HDMI1 */
&hdmi {
compatible = "cdn,imx8qm-hdmi";
@@ -416,7 +444,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>,
<&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>,
- <&pinctrl_gpio3>, <&pinctrl_gpio4>,
+ <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_keys>,
<&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>,
<&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>,
<&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>,
@@ -513,6 +541,14 @@
>;
};
+ /* Apalis CAN3 (optional) */
+ pinctrl_flexcan3: flexcan2grp {
+ fsl,pins = <
+ IMX8QM_FLEXCAN2_TX_DMA_FLEXCAN2_TX 0x21
+ IMX8QM_FLEXCAN2_RX_DMA_FLEXCAN2_RX 0x21
+ >;
+ };
+
/* Apalis DAP1 */
pinctrl_dap1_gpios: dap1gpiosgrp {
fsl,pins = <
@@ -1385,11 +1421,11 @@
/*
* Add GPIO2_20 as a wakeup source:
- * Pin: SC_P_SPI3_CS0 (MXM3_37/WAKE1_MICO)
- * Type: SC_PAD_WAKEUP_FALL_EDGE
+ * Pin: 101 SC_P_SPI3_CS0 (MXM3_37/WAKE1_MICO)
+ * Type: 5 SC_PAD_WAKEUP_FALL_EDGE
* Line: 20
*/
- pad-wakeup = <101 5 20>;
+ pad-wakeup = <IMX8QM_SPI3_CS0 5 20>;
pad-wakeup-num = <1>;
};
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts
new file mode 100644
index 000000000000..db428d945ab6
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx-colibri-aster.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8dx-colibri.dtsi"
+#include "imx8x-colibri-aster.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8DX on Aster Board";
+ compatible = "toradex,colibri-imx8x-aster",
+ "toradex,colibri-imx8x",
+ "fsl,imx8qxp",
+ "fsl,imx8dx";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts
new file mode 100644
index 000000000000..e3d9f450286c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx-colibri-eval-v3.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8dx-colibri.dtsi"
+#include "imx8x-colibri-eval-v3.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8DX on Colibri Evaluation Board V3";
+ compatible = "toradex,colibri-imx8x-eval-v3",
+ "toradex,colibri-imx8x",
+ "fsl,imx8qxp", "fsl,imx8dx";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts
new file mode 100644
index 000000000000..f864ab3cdb52
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris-v2.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8dx-colibri.dtsi"
+#include "imx8x-colibri-iris-v2.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8DX on Colibri Iris V2 Board";
+ compatible = "toradex,colibri-imx8x-iris-v2",
+ "toradex,colibri-imx8x",
+ "fsl,imx8qxp", "fsl,imx8dx";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts b/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts
new file mode 100644
index 000000000000..a89ec2efbc8a
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx-colibri-iris.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8dx-colibri.dtsi"
+#include "imx8x-colibri-iris.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8DX on Colibri Iris Board";
+ compatible = "toradex,colibri-imx8x-iris",
+ "toradex,colibri-imx8x",
+ "fsl,imx8qxp", "fsl,imx8dx";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi
new file mode 100644
index 000000000000..c61a68aa79e3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dx-colibri.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+#include "dt-bindings/pwm/pwm.h"
+#include "imx8dx.dtsi"
+#include "imx8x-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8DX Module";
+ compatible = "toradex,colibri-imx8x", "fsl,imx8dx";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
index bb0aa90cacba..85422979b11b 100755
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
@@ -99,30 +99,6 @@
vin-supply = <&buck4_reg>;
};
- reg_usb0_vbus: regulator-usb0-vbus {
- compatible = "regulator-fixed";
- enable-active-high;
- /* Verdin USB1_EN */
- gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_usb1_en>;
- regulator-max-microvolt = <5000000>;
- regulator-min-microvolt = <5000000>;
- regulator-name = "usb0_vbus";
- };
-
- reg_usb1_vbus: regulator-usb1-vbus {
- compatible = "regulator-fixed";
- enable-active-high;
- /* Verdin USB_2_EN (SODIMM 185) */
- gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_usb2_en>;
- regulator-max-microvolt = <5000000>;
- regulator-min-microvolt = <5000000>;
- regulator-name = "usb1_vbus";
- };
-
reg_usdhc2_vmmc: regulator-usdhc2 {
compatible = "regulator-fixed";
enable-active-high;
@@ -732,7 +708,6 @@
fsl,phy-tx-preemp-amp-tune = <3>;
fsl,phy-tx-rise-tune = <0>;
fsl,phy-tx-vref-tune = <6>;
- vbus-supply = <&reg_usb0_vbus>;
};
&usb_dwc3_0 {
@@ -742,16 +717,19 @@
srp-disable;
adp-disable;
usb-role-switch;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1_en>;
};
/* Verdin USB_2 */
&usb3_phy1 {
fsl,phy-tx-preemp-amp-tune = <2>;
- vbus-supply = <&reg_usb1_vbus>;
};
&usb_dwc3_1 {
dr_mode = "host";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb2_en>;
};
/* Verdin SD_1 */
@@ -1131,18 +1109,6 @@
>;
};
- pinctrl_reg_usb1_en: regusb1engrp {
- fsl,pins = <
- MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x184 /* SODIMM 155 */
- >;
- };
-
- pinctrl_reg_usb2_en: regusb2engrp {
- fsl,pins = <
- MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x184 /* SODIMM 185 */
- >;
- };
-
pinctrl_sai1: sai1grp {
fsl,pins = <
MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI1_TX_SYNC 0x1d6 /* SODIMM 32 */
@@ -1201,6 +1167,18 @@
>;
};
+ pinctrl_usb1_en: usb1engrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO12__USB1_PWR 0x184 /* SODIMM 155 */
+ >;
+ };
+
+ pinctrl_usb2_en: usb2engrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO14__USB2_PWR 0x184 /* SODIMM 185 */
+ >;
+ };
+
/* On-module Wi-Fi/BT */
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts
new file mode 100644
index 000000000000..9e61c7aaa69e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8qm-apalis-v1.1.dtsi"
+#include "imx8-apalis-ixora-v1.2.dtsi"
+
+/ {
+ model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.2 Carrier Board";
+ compatible = "toradex,apalis-imx8qm-ixora-v1.2",
+ "toradex,apalis-imx8-ixora-v1.2",
+ "toradex,apalis-imx8qm-ixora",
+ "toradex,apalis-imx8-ixora",
+ "toradex,apalis-imx8qm",
+ "toradex,apalis-imx8",
+ "fsl,imx8qm";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.2.dts b/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.2.dts
new file mode 100644
index 000000000000..2659eb894ac2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.2.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8qp-apalis-v1.1.dtsi"
+#include "imx8-apalis-ixora-v1.2.dtsi"
+
+/ {
+ model = "Toradex Apalis iMX8QP V1.1 on Apalis Ixora V1.2 Carrier Board";
+ compatible = "toradex,apalis-imx8qp-v1.1-ixora-v1.2",
+ "toradex,apalis-imx8qp-v1.1-ixora",
+ "toradex,apalis-imx8qp-v1.1",
+ "toradex,apalis-imx8-v1.1",
+ "toradex,apalis-imx8",
+ "fsl,imx8qp";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-apalis.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-apalis.dtsi
index f47ea1c5483d..86927a1b2f3b 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-apalis.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-apalis.dtsi
@@ -71,22 +71,6 @@
3000 1>;
};
- /* Apalis WAKE1_MICO */
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_keys>;
- status = "disabled";
-
- wakeup_key: wakeup-key {
- label = "Wake-Up";
- gpios = <&lsio_gpio1 26 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_WAKEUP>;
- debounce-interval = <10>;
- wakeup-source;
- };
- };
-
imx8x_cm4: imx8x_cm4@0 {
compatible = "fsl,imx8qxp-cm4";
rsc-da = <0x90000000>;
@@ -541,7 +525,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dap1_gpios>,
<&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio5>,
- <&pinctrl_gpio6>, <&pinctrl_mmc1_gpios>,
+ <&pinctrl_gpio6>, <&pinctrl_gpio_keys>, <&pinctrl_mmc1_gpios>,
<&pinctrl_qspi0a_gpios>, <&pinctrl_sata1_act>,
<&pinctrl_usbh_oc_n>, <&pinctrl_usbo1oc>,
<&pinctrl_wifi_sclk>;
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-aster.dts b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-aster.dts
index a80825009ad2..929b9d6a470b 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-aster.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-aster.dts
@@ -1,57 +1,16 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Copyright 2018-2019 Toradex
+ * Copyright 2018-2021 Toradex
*/
/dts-v1/;
#include "imx8qxp-colibri.dtsi"
+#include "imx8x-colibri-aster.dtsi"
/ {
- model = "Toradex Colibri iMX8QXP/DX on Aster Board";
+ model = "Toradex Colibri iMX8QXP on Aster Board";
compatible = "toradex,colibri-imx8x-aster",
"toradex,colibri-imx8x",
"fsl,imx8qxp";
};
-
-/* Colibri Ethernet */
-&fec1 {
- status = "okay";
-};
-
-&iomuxc {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog2>;
-};
-
-&lpspi2 {
- fsl,spi-num-chipselects = <2>;
- cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_LOW
- &lsio_gpio5 2 GPIO_ACTIVE_LOW>;
-
- spidev1: spidev@1 {
- compatible = "toradex,evalspi";
- reg = <1>;
- spi-max-frequency = <10000000>;
- };
-};
-
-/* Colibri UART_B */
-&lpuart0 {
- status = "okay";
-};
-
-/* Colibri UART_C */
-&lpuart2 {
- status = "okay";
-};
-
-/* Colibri UART_A */
-&lpuart3 {
- status= "okay";
-};
-
-/* Colibri SDCard */
-&usdhc2 {
- status = "okay";
-};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-dsihdmi-eval-v3.dts b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-dsihdmi-eval-v3.dts
deleted file mode 100644
index 7cfdadb02b57..000000000000
--- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-dsihdmi-eval-v3.dts
+++ /dev/null
@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright 2018-2019 Toradex
- */
-
-/dts-v1/;
-
-#include "imx8qxp-colibri.dtsi"
-#include "imx8qxp-colibri-eval-v3.dtsi"
-
-/ {
- model = "Toradex Colibri iMX8QXP/DX with LT8912 MIPI-DSI 2 HDMI bridge";
- compatible = "toradex,colibri-imx8x-dsihdmi-eval-v3",
- "toradex,colibri-imx8x",
- "fsl,imx8qxp";
-
-};
-
-&iomuxc {
- pinctrl-names = "default";
-
- colibri-imx8qxp {
- /* DSI/LVDS Hot Plug Detect on FFC (X2) */
- pinctrl_gpio_hpd: gpio-hpd {
- fsl,pins = <
- IMX8QXP_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO31 0x20 /* SODIMM 138 */
- >;
- };
- };
-};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts
index 0824887773c9..710539a83394 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts
@@ -1,15 +1,15 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Copyright 2018-2019 Toradex
+ * Copyright 2018-2021 Toradex
*/
/dts-v1/;
#include "imx8qxp-colibri.dtsi"
-#include "imx8qxp-colibri-eval-v3.dtsi"
+#include "imx8x-colibri-eval-v3.dtsi"
/ {
- model = "Toradex Colibri iMX8QXP/DX on Colibri Evaluation Board V3";
+ model = "Toradex Colibri iMX8QXP on Colibri Evaluation Board V3";
compatible = "toradex,colibri-imx8x-eval-v3",
"toradex,colibri-imx8x",
"fsl,imx8qxp";
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris-v2.dts b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris-v2.dts
new file mode 100644
index 000000000000..39a3a54661c3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris-v2.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8qxp-colibri.dtsi"
+#include "imx8x-colibri-iris-v2.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8QXP on Colibri Iris V2 Board";
+ compatible = "toradex,colibri-imx8x-iris-v2",
+ "toradex,colibri-imx8x",
+ "fsl,imx8qxp";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts
new file mode 100644
index 000000000000..d1bf8ee902b4
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8qxp-colibri.dtsi"
+#include "imx8x-colibri-iris.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8QXP on Colibri Iris Board";
+ compatible = "toradex,colibri-imx8x-iris",
+ "toradex,colibri-imx8x",
+ "fsl,imx8qxp";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-lvds-dual-channel.dts b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-lvds-dual-channel.dts
new file mode 100644
index 000000000000..1cd7e3038ba9
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-lvds-dual-channel.dts
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2020 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8qxp-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8QXP/DX on LVDS Embedded World Demo";
+ compatible = "toradex,colibri-imx8x-lvds-demo",
+ "toradex,colibri-imx8x",
+ "fsl,imx8qxp";
+
+ panel_lvds: panel-lvds {
+ compatible = "panel-lvds";
+ backlight = <&backlight>;
+ status = "okay";
+
+ panel-timing {
+ clock-frequency = <138500000>;
+ hactive = <1920>;
+ vactive = <1080>;
+ hback-porch = <80>;
+ hfront-porch = <48>;
+ vback-porch = <23>;
+ vfront-porch = <3>;
+ hsync-len = <32>;
+ vsync-len = <5>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ pixelclk-active = <0>;
+ };
+
+ port {
+ panel_lvds_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+ };
+};
+
+&adma_pwm {
+ status = "okay";
+};
+
+&adma_pwm_lpcg {
+ status = "okay";
+};
+
+&backlight {
+ pinctrl-0 = <&pinctrl_gpio_hpd>;
+ enable-gpios = <&lsio_gpio1 31 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
+ status = "okay";
+};
+
+/* Colibri FastEthernet */
+&fec1 {
+ status = "okay";
+};
+
+&ldb1 {
+ fsl,dual-channel;
+ status = "okay";
+
+ lvds-channel@0 {
+ fsl,data-mapping = "jeida";
+ fsl,data-width = <24>;
+ status = "okay";
+
+ port@1 {
+ reg = <1>;
+
+ lvds0_out: endpoint {
+ remote-endpoint = <&panel_lvds_in>;
+ };
+ };
+ };
+};
+
+&ldb1_phy {
+ status = "okay";
+};
+
+&ldb2 {
+ status = "disabled";
+};
+
+&ldb2_phy {
+ status = "okay";
+};
+
+/* Colibri UART_A */
+&lpuart3 {
+ status= "okay";
+};
+
+&mipi0_dphy {
+ status = "okay";
+};
+
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-lvds-single-channel.dts b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-lvds-single-channel.dts
new file mode 100644
index 000000000000..ebe216349171
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-lvds-single-channel.dts
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2020 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx8qxp-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8QXP/DX on LVDS Embedded World Demo";
+ compatible = "toradex,colibri-imx8x-lvds-demo",
+ "toradex,colibri-imx8x",
+ "fsl,imx8qxp";
+
+ panel_lvds: panel-lvds {
+ compatible = "panel-lvds";
+ backlight = <&backlight>;
+ data-mapping = "vesa-24";
+ width-mm = <217>;
+ height-mm = <136>;
+
+ status = "okay";
+
+ panel-timing {
+ clock-frequency = <68930000>;
+ hactive = <1280>;
+ vactive = <800>;
+ hback-porch = <64>;
+ hfront-porch = <64>;
+ vback-porch = <5>;
+ vfront-porch = <5>;
+ hsync-len = <40>;
+ vsync-len = <6>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ pixelclk-active = <0>;
+ };
+
+ port {
+ panel_lvds_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+ };
+};
+
+&adma_pwm {
+ status = "okay";
+};
+
+&adma_pwm_lpcg {
+ status = "okay";
+};
+
+&backlight {
+ pinctrl-0 = <&pinctrl_gpio_hpd>;
+ enable-gpios = <&lsio_gpio1 31 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
+ status = "okay";
+};
+
+/* Colibri FastEthernet */
+&fec1 {
+ status = "okay";
+};
+
+&ldb1 {
+ status = "okay";
+
+ lvds-channel@0 {
+ fsl,data-mapping = "spwg";
+ fsl,data-width = <24>;
+ status = "okay";
+
+ port@1 {
+ reg = <1>;
+
+ lvds0_out: endpoint {
+ remote-endpoint = <&panel_lvds_in>;
+ };
+ };
+ };
+};
+
+&ldb1_phy {
+ status = "okay";
+};
+
+&ldb2 {
+ status = "disabled";
+};
+
+/* Colibri UART_A */
+&lpuart3 {
+ status= "okay";
+};
+
+&mipi0_dphy {
+ status = "okay";
+};
+
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi
index 957f0da9604a..3b8321a8b247 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi
@@ -1,1464 +1,13 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Copyright 2018-2020 Toradex
+ * Copyright 2018-2021 Toradex
*/
#include "dt-bindings/pwm/pwm.h"
#include "imx8qxp.dtsi"
+#include "imx8x-colibri.dtsi"
/ {
- model = "Toradex Colibri iMX8QXP/DX Module";
+ model = "Toradex Colibri iMX8QXP Module";
compatible = "toradex,colibri-imx8x", "fsl,imx8qxp";
-
- backlight: backlight {
- compatible = "pwm-backlight";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_bl_on>;
- brightness-levels = <0 45 63 88 119 158 203 255>;
- default-brightness-level = <4>;
- enable-gpios = <&lsio_gpio3 12 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
- power-supply = <&reg_module_3v3>;
- pwms = <&adma_pwm 0 6666667 PWM_POLARITY_INVERTED>;
- status = "disabled";
- };
-
- chosen {
- bootargs = "console=ttyLP3,115200";
- stdout-path = &lpuart3;
- };
-
- /* Colibri Parallel RGB */
- display_lcdif: display@disp1 {
- compatible = "fsl,imx-lcdif-mux-display";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_lcdif>;
- clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_BYPASS>,
- <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>;
- clock-names = "bypass_div", "pixel";
- assigned-clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>;
- assigned-clock-parents = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_BYPASS>;
- fsl,lcdif-mux-regs = <&lcdif_mux_regs>;
- fsl,interface-pix-fmt = "rgb666";
- power-domains = <&pd IMX_SC_R_LCD_0>;
- status = "disabled";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- lcd_display_in: endpoint {
- remote-endpoint = <&dpu_disp1_lcdif>;
- };
- };
- };
-
- panel_dpi: panel-dpi {
- compatible = "panel-dpi";
- backlight = <&backlight>;
- data-mapping = "bgr666";
- power-supply = <&reg_module_3v3>;
- status = "disabled";
- };
-
- pcie_refclk: pcie-clock-generator {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
- };
-
- pcie_refclk_gate: pcie-ref-clock {
- compatible = "gpio-gate-clock";
- #clock-cells = <0>;
- clocks = <&pcie_refclk>;
- enable-gpios = <&gpio_expander_43 3 GPIO_ACTIVE_HIGH>;
- };
-
- reg_module_3v3: regulator-module-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "+V3.3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- reg_module_3v3_avdd: regulator-module-3v3-avdd {
- compatible = "regulator-fixed";
- regulator-name = "+V3.3_AVDD_AUDIO";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- reg_module_vref_1v8: regulator-module-vref-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "vref-1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- /*
- * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4
- * Shouldn't be used at A core and Linux side.
- *
- */
- m4_reserved: m4@0x88000000 {
- no-map;
- reg = <0 0x88000000 0 0x8000000>;
- };
-
- rpmsg_reserved: rpmsg@0x90000000 {
- no-map;
- reg = <0 0x90200000 0 0x200000>;
- };
-
- decoder_boot: decoder-boot@84000000 {
- reg = <0 0x84000000 0 0x2000000>;
- no-map;
- };
-
- encoder_boot: encoder-boot@86000000 {
- reg = <0 0x86000000 0 0x200000>;
- no-map;
- };
-
- decoder_rpc: decoder-rpc@0x92000000 {
- reg = <0 0x92000000 0 0x200000>;
- no-map;
- };
-
- encoder_rpc: encoder-rpc@0x92200000 {
- reg = <0 0x92200000 0 0x200000>;
- no-map;
- };
-
- encoder_reserved: encoder_reserved@94400000 {
- no-map;
- reg = <0 0x94400000 0 0x800000>;
- };
-
- vdev0vring0: vdev0vring0@90000000 {
- compatible = "shared-dma-pool";
- reg = <0 0x90000000 0 0x8000>;
- no-map;
- };
-
- vdev0vring1: vdev0vring1@90008000 {
- compatible = "shared-dma-pool";
- reg = <0 0x90008000 0 0x8000>;
- no-map;
- };
-
- vdev1vring0: vdev1vring0@90010000 {
- compatible = "shared-dma-pool";
- reg = <0 0x90010000 0 0x8000>;
- no-map;
- };
-
- vdev1vring1: vdev1vring1@90018000 {
- compatible = "shared-dma-pool";
- reg = <0 0x90018000 0 0x8000>;
- no-map;
- };
-
- vdevbuffer: vdevbuffer {
- compatible = "shared-dma-pool";
- reg = <0 0x90400000 0 0x100000>;
- no-map;
- };
- };
-
- sound_card: sound-card {
- compatible = "simple-audio-card";
- simple-audio-card,bitclock-master = <&dailink_master>;
- simple-audio-card,format = "i2s";
- simple-audio-card,frame-master = <&dailink_master>;
- simple-audio-card,name = "imx8qxp-sgtl5000";
-
- dailink_master: simple-audio-card,codec {
- sound-dai = <&sgtl5000_a>;
- clocks = <&mclkout0_lpcg 0>;
- };
-
- simple-audio-card,cpu {
- sound-dai = <&sai0>;
- };
- };
-
- vdd_3v3_vga: regulator-vga-avcc {
- compatible = "regulator-fixed";
- regulator-name = "+3.3V_AVCC_VGA";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-};
-
-/* Colibri Analogue Inputs */
-&adc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_adc0>;
- status = "okay";
- vref-supply = <&reg_module_vref_1v8>;
-};
-
-/* Colibri PWM_A */
-&adma_pwm {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_a>;
- #pwm-cells = <3>;
-};
-
-&adma_lcdif {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_lcdif>;
- status = "disabled";
-};
-
-/* Display Prefetch Resolve, (Tiling) */
-&dc0_dpr1_channel1 {
- status = "okay";
-};
-
-&dc0_dpr1_channel2 {
- status = "okay";
-};
-
-&dc0_dpr1_channel3 {
- status = "okay";
-};
-
-&dc0_dpr2_channel1 {
- status = "okay";
-};
-
-&dc0_dpr2_channel2 {
- status = "okay";
-};
-
-&dc0_dpr2_channel3 {
- status = "okay";
-};
-
-&dc0_pc {
- status = "okay";
-};
-
-&dc0_prg1 {
- status = "okay";
-};
-
-&dc0_prg2 {
- status = "okay";
-};
-
-&dc0_prg3 {
- status = "okay";
-};
-
-&dc0_prg4 {
- status = "okay";
-};
-
-&dc0_prg5 {
- status = "okay";
-};
-
-&dc0_prg6 {
- status = "okay";
-};
-
-&dc0_prg7 {
- status = "okay";
-};
-
-&dc0_prg8 {
- status = "okay";
-};
-
-&dc0_prg9 {
- status = "okay";
-};
-
-&dpu1 {
- status = "okay";
-};
-
-&dpu_disp1_lcdif {
- remote-endpoint = <&lcd_display_in>;
-};
-
-&enet0_lpcg {
- clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>,
- <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>,
- <&conn_axi_clk>,
- <&clk IMX_SC_R_ENET_0 IMX_SC_C_DISABLE_50>,
- <&conn_ipg_clk>,
- <&conn_ipg_clk>;
- clock-output-names = "enet0_lpcg_timer_clk",
- "enet0_lpcg_txc_sampling_clk",
- "enet0_lpcg_ahb_clk",
- "enet0_lpcg_ref_50mhz_clk",
- "enet0_lpcg_ipg_clk",
- "enet0_lpcg_ipg_s_clk";
-};
-
-/* Colibri FastEthernet */
-&fec1 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_fec1>;
- pinctrl-1 = <&pinctrl_fec1_sleep>;
- phy-mode = "rmii";
- phy-handle = <&ethphy0>;
- fsl,magic-packet;
- fsl,wakeup_irq = <0>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@2 {
- compatible = "ethernet-phy-ieee802.3-c22";
- max-speed = <100>;
- reg = <2>;
- };
- };
-};
-
-/* Colibri optional CAN on UART_B RTS/CTS */
-&flexcan1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan1>;
- xceiver-supply = <&reg_module_3v3>;
-};
-
-/* Colibri optional CAN on PS2 */
-&flexcan2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan2>;
- xceiver-supply = <&reg_module_3v3>;
-};
-
-/* Colibri optional CAN on UART_A TXD/RXD */
-&flexcan3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan3>;
- xceiver-supply = <&reg_module_3v3>;
-};
-
-&gpu_3d0 {
- status = "okay";
-};
-
-&hsio_refb_clk {
- status = "disabled";
-};
-
-/* On-module I2C */
-&i2c0 {
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <100000>;
- pinctrl-names = "default";
- /*
- * There is a shared clock between SGTL5000 and on-module USB hub,
- * so it is a good way to handle pinmuxing for this clock on a parent
- * device i2c0
- */
- pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>;
- status = "okay";
-
- /* on-module Resistive Touch controller */
- ad7879_ts: touchscreen@2c {
- compatible = "adi,ad7879-1";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ad7879_int>;
- reg = <0x2c>;
- interrupt-parent = <&lsio_gpio3>;
- interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
- touchscreen-max-pressure = <4096>;
- adi,resistance-plate-x = <120>;
- adi,first-conversion-delay = /bits/ 8 <3>;
- adi,acquisition-time = /bits/ 8 <1>;
- adi,median-filter-size = /bits/ 8 <2>;
- adi,averaging = /bits/ 8 <1>;
- adi,conversion-interval = /bits/ 8 <255>;
- status = "disabled";
- };
-
- /* GPIO expander */
- gpio_expander_43: gpio-expander@43 {
- compatible = "fcs,fxl6408";
- gpio-controller;
- #gpio-cells = <2>;
- reg = <0x43>;
- inital_io_dir = <0xff>;
- inital_output = <0x05>;
- gpio-line-names = "Wi-Fi_W_DISABLE", "Wi-Fi_WKUP_WLAN",
- "PWR_EN_+V3.3_WiFi_N", "PCIe_REF_CLK_EN",
- "USB_RESET_N", "USB_BYPASS_N", "Wi-Fi_PDn",
- "Wi-Fi_WKUP_BT";
- };
-
- sgtl5000_a: codec@a {
- compatible = "fsl,sgtl5000";
- #sound-dai-cells = <0>;
- assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
- <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
- <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
- <&mclkout0_lpcg 0>;
- assigned-clock-rates = <786432000>, <49152000>, <12000000>, <12000000>;
- clocks = <&mclkout0_lpcg 0>;
- clock-names = "mclk";
- reg = <0xa>;
- VDDA-supply = <&reg_module_3v3_avdd>;
- VDDD-supply = <&reg_module_vref_1v8>;
- VDDIO-supply = <&reg_module_3v3>;
- };
-
- /* USB3503A */
- usb3803@8 {
- compatible = "smsc,usb3803";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb3503a>;
- assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
- <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
- <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
- <&mclkout0_lpcg 0>;
- assigned-clock-rates = <786432000>, <49152000>, <12000000>, <12000000>;
- bypass-gpios = <&gpio_expander_43 5 GPIO_ACTIVE_LOW>;
- clocks = <&mclkout0_lpcg 0>;
- clock-names = "refclk";
- disabled-ports = <2>;
- initial-mode = <1>;
- intn-gpios = <&lsio_gpio3 4 GPIO_ACTIVE_LOW>;
- non-removable-devices = <1>;
- reg = <0x8>;
- reset-gpios = <&gpio_expander_43 4 GPIO_ACTIVE_LOW>;
- };
-};
-
-/* MIPI DSI accessible on FFC (X2) */
-&i2c0_mipi_lvds0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>;
- clock-frequency = <100000>;
- status = "disabled";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* DSI to HDMI Adapter V1.1A */
- pca9540_switch: i2c-switch@70 {
- compatible = "nxp,pca9540";
- reg = <0x70>;
- i2c-mux-idle-disconnect;
- status = "disabled";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* DDC/EDID */
- i2c_sw0: i2c-sw@0 {
- reg = <0>;
- };
-
- /* DSI-HDMI converter */
- i2c-sw@1 {
- reg = <1>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- lt8912_hdmi: dsihdmi@48 {
- compatible = "lontium,lt8912";
- ddc-i2c-bus = <&i2c_sw0>;
- hpd-gpios = <&lsio_gpio1 31 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_hpd>;
- reg = <0x48>;
-
- port {
- lt8912_in: endpoint {
- remote-endpoint = <&mipi0_dsi_host_out>;
- };
- };
- };
- };
- };
-};
-
-/* On-module MIPI CSI I2C accessible on FFC (X3) */
-&i2c0_mipi_lvds1 {
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c0_mipi_lvds1>;
-};
-
-/* Colibri I2C */
-&i2c1 {
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
-
- /* Atmel maxtouch controller */
- atmel_mxt_ts: touchscreen@4a {
- compatible = "atmel,maxtouch";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_atmel_conn>;
- reg = <0x4a>;
- interrupt-parent = <&lsio_gpio3>;
- interrupts = <20 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */
- reset-gpios = <&lsio_gpio3 24 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */
- status = "disabled";
- };
-};
-
-&imx8_gpu_ss {
- status = "okay";
-};
-
-&iomuxc {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_hog2>,
- <&pinctrl_ext_io0>, <&pinctrl_lpspi2_cs2>;
-
- colibri-imx8qxp {
- /* On-module touch pen-down interrupt */
- pinctrl_ad7879_int: ad7879-int {
- fsl,pins = <
- IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 0x21
- >;
- };
-
- /* Colibri Analogue Inputs */
- pinctrl_adc0: adc0grp {
- fsl,pins = <
- IMX8QXP_ADC_IN0_ADMA_ADC_IN0 0x60 /* SODIMM 8 */
- IMX8QXP_ADC_IN1_ADMA_ADC_IN1 0x60 /* SODIMM 6 */
- IMX8QXP_ADC_IN4_ADMA_ADC_IN4 0x60 /* SODIMM 4 */
- IMX8QXP_ADC_IN5_ADMA_ADC_IN5 0x60 /* SODIMM 2 */
- >;
- };
-
- /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */
- pinctrl_atmel_conn: mxt-ts-connector {
- fsl,pins = <
- IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x4000021 /* SODIMM 107 */
- IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x21 /* SODIMM 106 */
- >;
- };
-
- /* Atmel MXT touchsceen + Capacitive Touch Adapter */
- /* NOTE: This pingroup conflicts with pingroups
- * pinctrl_pwm_b/pinctrl_pwm_c. Don't enable them
- * simultaneously.
- */
- pinctrl_atmel_adap: mxt-ts-adapter {
- fsl,pins = <
- IMX8QXP_UART1_TX_LSIO_GPIO0_IO21 0x4000021 /* SODIMM 28 */
- IMX8QXP_UART1_RX_LSIO_GPIO0_IO22 0x21 /* SODIMM 30 */
- >;
- };
-
- pinctrl_can_int: can-int-grp {
- fsl,pins = <
- IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40 /* SODIMM 73 */
- >;
- };
-
- pinctrl_csi_ctl: csictlgrp {
- fsl,pins = <
- IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20 /* SODIMM 77 / X3-22 / CSI_CTL_GPIO2 */
- IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20 /* SODIMM 89 / X3-11 / CSI_CTL_RESET# */
- >;
- };
-
- pinctrl_csi_mclk: csimclkgrp {
- fsl,pins = <
- IMX8QXP_CSI_MCLK_CI_PI_MCLK 0xC0000041 /* SODIMM 75 / X3-12 */
- >;
- };
-
- pinctrl_gpiokeys: gpiokeysgrp {
- fsl,pins = <
- IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041 /* SODIMM 45 */
- >;
- };
-
- /* Colibri UART_B */
- pinctrl_lpuart0: lpuart0grp {
- fsl,pins = <
- IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 /* SODIMM 36 */
- IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 /* SODIMM 38 */
- IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020 /* SODIMM 34 */
- IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020 /* SODIMM 32 */
- >;
- };
-
- /* Colibri UART_C */
- pinctrl_lpuart2: lpuart2grp {
- fsl,pins = <
- IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020 /* SODIMM 19 */
- IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020 /* SODIMM 21 */
- >;
- };
-
- /* Colibri UART_A */
- pinctrl_lpuart3: lpuart3grp {
- fsl,pins = <
- IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020 /* SODIMM 33 */
- IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 /* SODIMM 35 */
- >;
- };
-
- /* Colibri UART_A Control */
- pinctrl_lpuart3_ctrl: lpuart3ctrlgrp {
- fsl,pins = <
- IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x20 /* SODIMM 23 */
- IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 0x20 /* SODIMM 25 */
- IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 0x20 /* SODIMM 27 */
- IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0x20 /* SODIMM 29 */
- IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x20 /* SODIMM 31 */
- IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20 /* SODIMM 37 */
- >;
- };
-
- /* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */
- pinctrl_fec1: fec1grp {
- fsl,pins = <
- IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0 /* Use pads in 3.3V mode */
- IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD 0x000014a0 /* Use pads in 3.3V mode */
- IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020
- IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020
- IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61
- IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT 0x06000061
- IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61
- IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61
- IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61
- IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61
- IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61
- IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER 0x61
- >;
- };
-
- pinctrl_fec1_sleep: fec1-sleep-grp {
- fsl,pins = <
- IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11 0x06000041
- IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10 0x06000041
- IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x41
- IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x41
- IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 0x41
- IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 0x41
- IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04 0x41
- IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05 0x41
- IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06 0x41
- IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07 0x41
- >;
- };
-
- /* Colibri LCD Back-Light GPIO */
- pinctrl_gpio_bl_on: gpio-bl-on {
- fsl,pins = <
- IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12 0x60 /* SODIMM 71 */
- >;
- };
-
- /* HDMI Hot Plug Detect on FFC (X2) */
- pinctrl_gpio_hpd: gpio-hpd {
- fsl,pins = <
- IMX8QXP_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO31 0x20 /* SODIMM 138 */
- >;
- };
-
- pinctrl_hog0: hog0grp {
- fsl,pins = <
- IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0 /* Use pads in 3.3V mode */
- >;
- };
-
- pinctrl_hog1: hog1grp {
- fsl,pins = <
- IMX8QXP_CSI_D07_CI_PI_D09 0x61 /* SODIMM 65 */
- IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20 /* SODIMM 69 */
- IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20 /* SODIMM 79 */
- IMX8QXP_CSI_D02_CI_PI_D04 0x61 /* SODIMM 79 */
- IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020 /* SODIMM 85 */
- IMX8QXP_CSI_D06_CI_PI_D08 0x61 /* SODIMM 85 */
- IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20 /* SODIMM 97 */
- IMX8QXP_CSI_D03_CI_PI_D05 0x61 /* SODIMM 97 */
- IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20 /* SODIMM 101 */
- IMX8QXP_CSI_D00_CI_PI_D02 0x61 /* SODIMM 101 */
- IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20 /* SODIMM 103 */
- IMX8QXP_CSI_D01_CI_PI_D03 0x61 /* SODIMM 103 */
- IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20 /* SODIMM 105 */
- IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20 /* SODIMM 127 */
- IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20 /* SODIMM 131 */
- IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20 /* SODIMM 133 */
- IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20 /* SODIMM 96 */
- IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 0x20 /* SODIMM 98 */
- IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20 /* SODIMM 100 */
- IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22 0x20 /* SODIMM 102 */
- IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23 0x20 /* SODIMM 104 */
- >;
- };
-
- pinctrl_hog2: hog2grp {
- fsl,pins = <
- IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20 /* SODIMM 93 */
- >;
- };
-
- pinctrl_hog3: hog3grp {
- fsl,pins = <
- IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20 /* SODIMM 75 */
- >;
- };
-
- /*
- * This pin is used in the SCFW as a UART. Using it from
- * Linux would require rewritting the SCFW board file.
- */
- pinctrl_hog_scfw: hogscfwgrp {
- fsl,pins = <
- IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03 0x20 /* SODIMM 144 */
- >;
- };
-
- /* On Module I2C */
- pinctrl_i2c0: i2c0grp {
- fsl,pins = <
- IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 0x06000021
- IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 0x06000021
- >;
- };
-
- /* Colibri I2C */
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL 0x06000021 /* SODIMM 196 */
- IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA 0x06000021 /* SODIMM 194 */
- >;
- };
-
- /* Colibri optional CAN on UART_B RTS/CTS */
- pinctrl_flexcan1: flexcan0grp {
- fsl,pins = <
- IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 /* SODIMM 32 */
- IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 /* SODIMM 34 */
- >;
- };
-
- /* Colibri optional CAN on PS2 */
- pinctrl_flexcan2: flexcan1grp {
- fsl,pins = <
- IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 /* SODIMM 55 */
- IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 /* SODIMM 63 */
- >;
- };
-
- /* Colibri optional CAN on UART_A TXD/RXD */
- pinctrl_flexcan3: flexcan2grp {
- fsl,pins = <
- IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21 /* SODIMM 35 */
- IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x21 /* SODIMM 33 */
- >;
- };
-
- /* On module wifi module */
- pinctrl_pcieb: pciebgrp {
- fsl,pins = <
- IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000061 /* SODIMM 178 */
- IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000061 /* SODIMM 94 */
- IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x60 /* SODIMM 81 */
- >;
- };
-
- /* Colibri PWM_A */
- pinctrl_pwm_a: pwma {
- /* both pins are connected together, reserve the unused CSI_D05 */
- fsl,pins = <
- IMX8QXP_CSI_D05_CI_PI_D07 0x61 /* SODIMM 59 */
- IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT 0x60 /* SODIMM 59 */
- >;
- };
-
- /* Colibri PWM_B */
- pinctrl_pwm_b: pwmb {
- fsl,pins = <
- IMX8QXP_UART1_TX_LSIO_PWM0_OUT 0x60 /* SODIMM 28 */
- >;
- };
-
- /* Colibri PWM_C */
- pinctrl_pwm_c: pwmc {
- fsl,pins = <
- IMX8QXP_UART1_RX_LSIO_PWM1_OUT 0x60 /* SODIMM 30 */
- >;
- };
-
- /* Colibri PWM_D */
- pinctrl_pwm_d: pwmd {
- /* both pins are connected together, reserve the unused CSI_D04 */
- fsl,pins = <
- IMX8QXP_CSI_D04_CI_PI_D06 0x61 /* SODIMM 67 */
- IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT 0x60 /* SODIMM 67 */
- >;
- };
-
- /* On-module I2S */
- pinctrl_sai0: sai0grp {
- fsl,pins = <
- IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD 0x06000040
- IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD 0x06000040
- IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC 0x06000040
- IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS 0x06000040
- >;
- };
-
- /* Colibri Audio Analogue Microphone GND */
- pinctrl_sgtl5000: sgtl5000 {
- fsl,pins = <
- /* MIC GND EN */
- IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06 0x41
- >;
- };
-
- /* On-module SGTL5000 clock */
- pinctrl_sgtl5000_usb_clk: sgtl5000-usb-clk {
- fsl,pins = <
- IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0 0x21
- >;
- };
-
- /* On-module USB interrupt */
- pinctrl_usb3503a: usb3503a-grp {
- fsl,pins = <
- IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 0x61
- >;
- };
-
- /* Colibri USB Client Cable Detect */
- pinctrl_usbc_det: usbc-det {
- fsl,pins = <
- IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x06000040 /* SODIMM 137 */
- >;
- };
-
- pinctrl_ext_io0: ext-io0 {
- fsl,pins = <
- IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08 0x06000040 /* SODIMM 135 */
- >;
- };
-
- /* Colibri Parallel RGB LCD Interface */
- pinctrl_lcdif: lcdif-pins {
- fsl,pins = <
- IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x40 /* SODIMM 44 */
- IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN 0x40 /* SODIMM 44 */
- IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK 0x60 /* SODIMM 56 */
- IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC 0x60 /* SODIMM 68 */
- IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC 0x60 /* SODIMM 82 */
- IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00 0x60 /* SODIMM 76 */
- IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x60 /* SODIMM 76 */
- IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01 0x60 /* SODIMM 70 */
- IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02 0x60 /* SODIMM 60 */
- IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03 0x60 /* SODIMM 58 */
- IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04 0x60 /* SODIMM 78 */
- IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05 0x60 /* SODIMM 72 */
- IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06 0x60 /* SODIMM 80 */
- IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07 0x60 /* SODIMM 46 */
- IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08 0x60 /* SODIMM 62 */
- IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09 0x60 /* SODIMM 48 */
- IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10 0x60 /* SODIMM 74 */
- IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11 0x60 /* SODIMM 50 */
- IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 0x60 /* SODIMM 52 */
- IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13 0x60 /* SODIMM 54 */
- IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 0x60 /* SODIMM 66 */
- IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15 0x60 /* SODIMM 64 */
- IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 0x60 /* SODIMM 57 */
- IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x60 /* SODIMM 57 */
- IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 0x60 /* SODIMM 61 */
- >;
- };
-
- /* LVDS converter on Iris v2.0 */
- pinctrl_lvds_converter: lcd-lvds {
- fsl,pins = <
- IMX8QXP_FLEXCAN1_TX_LSIO_GPIO1_IO18 0x20 /* SODIMM 55 */
- /* 6B/8B mode. Select LOW - 8B mode (24bit) */
- IMX8QXP_FLEXCAN1_RX_LSIO_GPIO1_IO17 0x20 /* SODIMM 63 */
- IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 0x20 /* SODIMM 95 */
- IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x20 /* SODIMM 99 */
- >;
- };
-
- /* USB Host Power Enable */
- pinctrl_usbh1_reg: usbh1-reg {
- fsl,pins = <
- IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 0x06000040 /* SODIMM 129 */
- >;
- };
-
- /* On-module eMMC */
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
- IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21
- IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21
- IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21
- IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21
- IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21
- IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21
- IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21
- IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21
- IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21
- IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41
- IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21
- >;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
- fsl,pins = <
- IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
- IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21
- IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21
- IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21
- IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21
- IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21
- IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21
- IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21
- IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21
- IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21
- IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41
- IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
- fsl,pins = <
- IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
- IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21
- IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21
- IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21
- IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21
- IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21
- IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21
- IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21
- IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21
- IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21
- IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41
- IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21
- >;
- };
-
- /* Colibri SDCard CardDetect */
- pinctrl_usdhc2_gpio: usdhc2gpiogrp {
- fsl,pins = <
- IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x06000021 /* SODIMM 43 */
- >;
- };
-
- pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp {
- fsl,pins = <
- IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x60 /* SODIMM 43 */
- >;
- };
-
- /* Colibri SDCard */
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */
- IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */
- IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */
- IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */
- IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */
- IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */
- IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21
- >;
- };
-
- pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
- fsl,pins = <
- IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */
- IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */
- IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */
- IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */
- IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */
- IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */
- IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21
- >;
- };
-
- pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
- fsl,pins = <
- IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */
- IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */
- IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */
- IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */
- IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */
- IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */
- IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21
- >;
- };
-
- pinctrl_usdhc2_sleep: usdhc2slpgrp {
- fsl,pins = <
- IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23 0x60 /* SODIMM 47 */
- IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24 0x60 /* SODIMM 190 */
- IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60 /* SODIMM 192 */
- IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60 /* SODIMM 49 */
- IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60 /* SODIMM 51 */
- IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60 /* SODIMM 53 */
- IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21
- >;
- };
-
- /* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */
- pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp {
- fsl,pins = <
- IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 /* SODIMM 140 */
- IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 /* SODIMM 142 */
- >;
- };
-
- /* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */
- pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp {
- fsl,pins = <
- IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 /* SODIMM 186 */
- IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 /* SODIMM 188 */
- >;
- };
-
- /* Colibri SPI */
- pinctrl_lpspi2: lpspi2 {
- fsl,pins = <
- IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x21 /* SODIMM 86 */
- IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040 /* SODIMM 92 */
- IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x06000040 /* SODIMM 90 */
- IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x06000040 /* SODIMM 88 */
- >;
- };
-
- pinctrl_lpspi2_cs2: lpspi2-cs2 {
- fsl,pins = <
- IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x21 /* SODIMM 65 */
- >;
- };
-
- pinctrl_wifi: wifigrp {
- fsl,pins = <
- IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20
- >;
- };
- };
-};
-
-&irqsteer_csi0 {
- status = "okay";
-};
-
-&isi_0 {
- /**
- * interface = <Input MIPI_VCx Output>
- * Input: 0-DC0, 1-DC1, 2-MIPI CSI0, 3-MIPI CSI1, 4-HDMI, 5-MEM, INPUT: 6-PARALLEL CSI
- * MIPI_VCx: 0-VC0, 1-VC1, 2-VC2, 3-VC3, MIPI CSI only
- * Output: 0-DC0, 1-DC1, 2-MEM
- */
- interface = <2 0 2>;
-
- cap_device {
- status = "okay";
- };
-
- m2m_device {
- status = "okay";
- };
-};
-
-&isi_1 {
- interface = <6 0 2>;
- parallel_csi;
-};
-
-/* Colibri SPI */
-&lpspi2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_lpspi2>;
- cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_LOW>;
- status = "okay";
-
- spidev0: spidev@0 {
- compatible = "toradex,evalspi";
- reg = <0>;
- spi-max-frequency = <10000000>;
- };
-};
-
-/* Colibri UART_B */
-&lpuart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_lpuart0>;
-};
-
-/* Colibri UART_C */
-&lpuart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_lpuart2>;
-};
-
-/* Colibri UART_A */
-&lpuart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>;
-};
-
-&lsio_gpio0 {
- gpio-line-names = "",
- "SODIMM_70",
- "SODIMM_60",
- "SODIMM_58",
- "SODIMM_78",
- "SODIMM_72",
- "SODIMM_80",
- "SODIMM_46",
- "SODIMM_62",
- "SODIMM_48",
- "SODIMM_74",
- "SODIMM_50",
- "SODIMM_52",
- "SODIMM_54",
- "SODIMM_66",
- "SODIMM_64",
- "SODIMM_68",
- "",
- "",
- "SODIMM_82",
- "SODIMM_56",
- "SODIMM_28",
- "SODIMM_30",
- "",
- "SODIMM_61",
- "SODIMM_103",
- "",
- "",
- "",
- "SODIMM_25",
- "SODIMM_27",
- "SODIMM_100";
- status = "okay";
-};
-
-&lsio_gpio1 {
- gpio-line-names = "SODIMM_86",
- "SODIMM_92",
- "SODIMM_90",
- "SODIMM_88",
- "",
- "",
- "",
- "SODIMM_59",
- "",
- "SODIMM_6",
- "SODIMM_8",
- "",
- "",
- "SODIMM_2",
- "SODIMM_4",
- "SODIMM_34",
- "SODIMM_32",
- "SODIMM_63",
- "SODIMM_55",
- "SODIMM_33",
- "SODIMM_35",
- "SODIMM_36",
- "SODIMM_38",
- "SODIMM_21",
- "SODIMM_19",
- "SODIMM_140",
- "SODIMM_142",
- "SODIMM_196",
- "SODIMM_194",
- "SODIMM_186",
- "SODIMM_188",
- "SODIMM_138";
- status = "okay";
-};
-
-&lsio_gpio2 {
- gpio-line-names = "SODIMM_23",
- "",
- "",
- "SODIMM_144";
- status = "okay";
-};
-
-&lsio_gpio3 {
- gpio-line-names = "SODIMM_96",
- "SODIMM_75",
- "SODIMM_37",
- "SODIMM_29",
- "",
- "",
- "",
- "",
- "",
- "SODIMM_43",
- "SODIMM_45",
- "SODIMM_69",
- "SODIMM_71",
- "SODIMM_73",
- "SODIMM_77",
- "SODIMM_89",
- "SODIMM_93",
- "SODIMM_95",
- "SODIMM_99",
- "SODIMM_105",
- "SODIMM_107",
- "SODIMM_98",
- "SODIMM_102",
- "SODIMM_104",
- "SODIMM_106";
- status = "okay";
-};
-
-&lsio_gpio4 {
- gpio-line-names = "",
- "",
- "",
- "SODIMM_129",
- "SODIMM_133",
- "SODIMM_127",
- "SODIMM_131",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "SODIMM_44",
- "",
- "SODIMM_76",
- "SODIMM_31",
- "SODIMM_47",
- "SODIMM_190",
- "SODIMM_192",
- "SODIMM_49",
- "SODIMM_51",
- "SODIMM_53";
- status = "okay";
-};
-
-&lsio_gpio5 {
- gpio-line-names = "",
- "SODIMM_57",
- "SODIMM_65",
- "SODIMM_85",
- "",
- "",
- "",
- "",
- "SODIMM_135",
- "SODIMM_137",
- "UNUSABLE_SODIMM_180",
- "UNUSABLE_SODIMM_184";
- status = "okay";
-};
-
-/* MIPI CSI accessible via FFC (X3) */
-&mipi_csi_0 {
- #address-cells = <1>;
- #size-cells = <0>;
- /delete-property/virtual-channel;
-};
-
-&mipi0_dsi_host {
- pwr-delay = <10>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- port@1 {
- reg = <1>;
- mipi0_dsi_host_out: endpoint {
- remote-endpoint = <&lt8912_in>;
- };
- };
- };
-};
-
-&mipi1_dsi_host {
- pwr-delay = <10>;
-};
-
-/* On-module PCIe for Wi-Fi */
-&pcieb{
- compatible = "fsl,imx8qxp-pcie","snps,dw-pcie";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcieb &pinctrl_wifi>;
- clocks = <&pcieb_lpcg 0>,
- <&pcieb_lpcg 1>,
- <&pcieb_lpcg 2>,
- <&phyx1_lpcg 0>,
- <&phyx1_crr1_lpcg 0>,
- <&pcieb_crr3_lpcg 0>,
- <&misc_crr5_lpcg 0>,
- <&pcie_refclk_gate>;
- clock-names = "pcie", "pcie_bus", "pcie_inbound_axi",
- "pcie_phy", "phy_per", "pcie_per", "misc_per",
- "pcie_ext";
-
- clkreq-gpio = <&lsio_gpio4 1 GPIO_ACTIVE_LOW>;
- ext_osc = <1>;
- fsl,max-link-speed = <1>;
- hard-wired = <1>;
- disable-gpio = <&gpio_expander_43 6 GPIO_ACTIVE_LOW>;
- power-on-gpio = <&gpio_expander_43 2 GPIO_ACTIVE_LOW>;
- reserved-region = <&rpmsg_reserved>;
- reset-gpio = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-/* Colibri PWM_B */
-&pwm0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_b>;
- #pwm-cells = <3>;
-};
-
-/* Colibri PWM_C */
-&pwm1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_c>;
- #pwm-cells = <3>;
-};
-
-/* Colibri PWM_D */
-&pwm2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_d>;
- #pwm-cells = <3>;
-};
-
-&rpmsg{
- /*
- * 64K for one rpmsg instance:
- */
- vdev-nums = <2>;
- reg = <0x0 0x90000000 0x0 0x20000>;
- memory-region = <&vdevbuffer>;
- status = "okay";
-};
-
-/* On-module I2S */
-&sai0 {
- #sound-dai-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sai0>;
- status = "okay";
-};
-
-&thermal_zones {
- pmic-thermal0 {
- polling-delay-passive = <250>;
- polling-delay = <2000>;
- thermal-sensors = <&tsens IMX_SC_R_PMIC_0>;
-
- trips {
- pmic_alert0: trip0 {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- pmic_crit0: trip1 {
- temperature = <125000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&pmic_alert0>;
- cooling-device =
- <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-};
-
-/* On-module eMMC */
-&usdhc1 {
- bus-width = <8>;
- no-sd;
- no-sdio;
- non-removable;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- status = "okay";
-};
-
-/* Colibri SDCard */
-&usdhc2 {
- bus-width = <4>;
- cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
- pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
- disable-wp;
- vmmc-supply = <&reg_module_3v3>;
-};
-
-&vpu_decoder {
- boot-region = <&decoder_boot>;
- rpc-region = <&decoder_rpc>;
- reg-csr = <0x2d040000>;
- core_type = <1>;
- status = "okay";
-};
-
-&vpu_encoder {
- boot-region = <&encoder_boot>;
- rpc-region = <&encoder_rpc>;
- reserved-region = <&encoder_reserved>;
- reg-rpc-system = <0x40000000>;
- resolution-max = <1920 1920>;
- mbox-names = "enc1_tx0", "enc1_tx1", "enc1_rx";
- mboxes = <&mu1_m0 0 0
- &mu1_m0 0 1
- &mu1_m0 1 0>;
- status = "okay";
-
- core0@1020000 {
- compatible = "fsl,imx8-mu1-vpu-m0";
- reg = <0x1020000 0x20000>;
- reg-csr = <0x1050000 0x10000>;
- interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>;
- fsl,vpu_ap_mu_id = <17>;
- fw-buf-size = <0x200000>;
- rpc-buf-size = <0x80000>;
- print-buf-size = <0x80000>;
- };
};
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi
new file mode 100644
index 000000000000..ad4c83d43ef8
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/* Colibri Ethernet */
+&fec1 {
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog2>;
+};
+
+&lpspi2 {
+ fsl,spi-num-chipselects = <2>;
+ cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_LOW
+ &lsio_gpio5 2 GPIO_ACTIVE_LOW>;
+
+ spidev1: spidev@1 {
+ compatible = "toradex,evalspi";
+ reg = <1>;
+ spi-max-frequency = <10000000>;
+ };
+};
+
+/* Colibri UART_B */
+&lpuart0 {
+ status = "okay";
+};
+
+/* Colibri UART_C */
+&lpuart2 {
+ status = "okay";
+};
+
+/* Colibri UART_A */
+&lpuart3 {
+ status= "okay";
+};
+
+/* Colibri SDCard */
+&usdhc2 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi
index 62d9c204a2fe..2e7a9ae4da11 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Copyright 2018-2020 Toradex
+ * Copyright 2018-2021 Toradex
*/
/ {
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi
new file mode 100644
index 000000000000..032b746132b1
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+#include "imx8x-colibri-iris.dtsi"
+
+/ {
+ reg_3v3_vmmc: regulator-3v3-vmmc {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enable_3v3_vmmc>;
+ regulator-name = "3v3_vmmc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&lsio_gpio0 31 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <100>;
+ enable-active-high;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lvds_converter &pinctrl_gpio_iris>;
+
+ usdhc {
+ pinctrl_enable_3v3_vmmc: enable_3v3_vmmc {
+ fsl,pins = <
+ IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20 /* SODIMM 100 */
+ >;
+ };
+ };
+};
+
+/* Colibri SD/MMC Card */
+&usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ cap-power-off-card;
+ /delete-property/ keep-power-in-suspend;
+ vmmc-supply = <&reg_3v3_vmmc>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
new file mode 100644
index 000000000000..bd6c85fafedd
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+/ {
+ aliases {
+ rtc0 = &rtc_i2c;
+ };
+
+ extcon_usbc_det: usbc_det {
+ compatible = "linux,extcon-usb-gpio";
+ debounce = <25>;
+ id-gpio = <&lsio_gpio5 9 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbc_det>;
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_usbh_vbus: regulator-usbh-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh1_reg>;
+ regulator-name = "usbh_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&lsio_gpio4 3 GPIO_ACTIVE_LOW>;
+ regulator-always-on;
+ };
+};
+
+/* Colibri Analogue Inputs */
+&adc0 {
+ status = "okay";
+};
+
+/* Colibri PWM_A */
+&adma_pwm {
+ status = "okay";
+};
+
+/* Colibri FastEthernet */
+&fec1 {
+ status = "okay";
+};
+
+/* Colibri I2C */
+&i2c1 {
+ status = "okay";
+
+ /* M41T0M6 real time clock on carrier board */
+ rtc_i2c: rtc@68 {
+ compatible = "st,m41t0";
+ reg = <0x68>;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_iris>;
+
+ gpio {
+ pinctrl_gpio_iris: gpio-iris {
+ fsl,pins = <
+ IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 0x20 /* SODIMM 98 */
+ IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20 /* SODIMM 133 */
+ IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20 /* SODIMM 103 */
+ IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20 /* SODIMM 101 */
+ IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20 /* SODIMM 97 */
+ IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020 /* SODIMM 85 */
+ IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20 /* SODIMM 79 */
+ IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041 /* SODIMM 45 */
+ >;
+ };
+ };
+
+ uart {
+ pinctrl_uart1_forceoff: uart1_forceoff {
+ fsl,pins = <
+ IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20 /* SODIMM 22 */
+ >;
+ };
+
+ pinctrl_uart23_forceoff: uart23_forceoff {
+ fsl,pins = <
+ IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x20 /* SODIMM 23 */
+ >;
+ };
+ };
+};
+
+&jpegdec {
+ status = "okay";
+};
+
+&jpegenc {
+ status = "okay";
+};
+
+/* Colibri UART_B */
+&lpuart0 {
+ status = "okay";
+};
+
+/* Colibri UART_C */
+&lpuart2 {
+ status = "okay";
+};
+
+/* Colibri UART_A */
+&lpuart3 {
+ status= "okay";
+};
+
+&lsio_gpio3 {
+ /*
+ * Add GPIO3_10 as a wakeup source:
+ * Pin: 157 SC_P_QSPI0A_DATA1 (SODIMM_45)
+ * Type: 6 SC_PAD_WAKEUP_RISE_EDGE
+ * Line: 10 GPIO3_IO10
+ */
+ pad-wakeup = <IMX8QXP_QSPI0A_DATA1 6 10>;
+ pad-wakeup-num = <1>;
+
+ /*
+ * This turns the LVDS transceiver on. If one wants to turn the
+ * transceiver off, that property has to be deleted and the gpio handled
+ * in userspace.
+ */
+ lvds_tx_on {
+ gpio-hog;
+ gpios = <18 0>;
+ output-high;
+ };
+};
+
+
+/* Colibri PWM_B */
+&pwm0 {
+ status = "okay";
+};
+
+/* Colibri PWM_C */
+&pwm1 {
+ status = "okay";
+};
+
+/* Colibri PWM_D */
+&pwm2 {
+ status = "okay";
+};
+
+/* USB PHY for &usbotg3 */
+&usb3phynop1 {
+ status = "okay";
+};
+
+&usbotg1 {
+ extcon = <&extcon_usbc_det &extcon_usbc_det>;
+ vbus-supply = <&reg_usbh_vbus>;
+ srp-disable;
+ hnp-disable;
+ adp-disable;
+ power-active-high;
+ disable-over-current;
+ status = "okay";
+};
+
+&usbotg3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+/* USB PHY for &usbotg1 */
+&usbphy1 {
+ status = "okay";
+};
+
+/* Colibri SD/MMC Card */
+&usdhc2 {
+ status = "okay";
+};
+
+&vpu_decoder {
+ status = "okay";
+};
+
+&vpu_encoder {
+ status = "okay";
+};
+
+&vpu_lpcg {
+ status = "okay";
+};
+
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
new file mode 100644
index 000000000000..617390dd7399
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -0,0 +1,1427 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2018-2021 Toradex
+ */
+
+#include "dt-bindings/pwm/pwm.h"
+
+/ {
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_bl_on>;
+ brightness-levels = <0 45 63 88 119 158 203 255>;
+ default-brightness-level = <4>;
+ enable-gpios = <&lsio_gpio3 12 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
+ power-supply = <&reg_module_3v3>;
+ pwms = <&adma_pwm 0 6666667 PWM_POLARITY_INVERTED>;
+ status = "disabled";
+ };
+
+ chosen {
+ bootargs = "console=ttyLP3,115200";
+ stdout-path = &lpuart3;
+ };
+
+ /* Colibri Parallel RGB */
+ display_lcdif: display@disp1 {
+ compatible = "fsl,imx-lcdif-mux-display";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif>;
+ clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_BYPASS>,
+ <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>;
+ clock-names = "bypass_div", "pixel";
+ assigned-clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>;
+ assigned-clock-parents = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_BYPASS>;
+ fsl,lcdif-mux-regs = <&lcdif_mux_regs>;
+ fsl,interface-pix-fmt = "rgb666";
+ power-domains = <&pd IMX_SC_R_LCD_0>;
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lcd_display_in: endpoint {
+ remote-endpoint = <&dpu_disp1_lcdif>;
+ };
+ };
+ };
+
+ panel_dpi: panel-dpi {
+ compatible = "panel-dpi";
+ backlight = <&backlight>;
+ data-mapping = "bgr666";
+ power-supply = <&reg_module_3v3>;
+ status = "disabled";
+ };
+
+ pcie_refclk: pcie-clock-generator {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
+
+ pcie_refclk_gate: pcie-ref-clock {
+ compatible = "gpio-gate-clock";
+ #clock-cells = <0>;
+ clocks = <&pcie_refclk>;
+ enable-gpios = <&gpio_expander_43 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_module_3v3: regulator-module-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_module_3v3_avdd: regulator-module-3v3-avdd {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3_AVDD_AUDIO";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_module_vref_1v8: regulator-module-vref-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vref-1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /*
+ * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4
+ * Shouldn't be used at A core and Linux side.
+ *
+ */
+ m4_reserved: m4@0x88000000 {
+ no-map;
+ reg = <0 0x88000000 0 0x8000000>;
+ };
+
+ rpmsg_reserved: rpmsg@0x90000000 {
+ no-map;
+ reg = <0 0x90200000 0 0x200000>;
+ };
+
+ decoder_boot: decoder-boot@84000000 {
+ reg = <0 0x84000000 0 0x2000000>;
+ no-map;
+ };
+
+ encoder_boot: encoder-boot@86000000 {
+ reg = <0 0x86000000 0 0x200000>;
+ no-map;
+ };
+
+ decoder_rpc: decoder-rpc@0x92000000 {
+ reg = <0 0x92000000 0 0x200000>;
+ no-map;
+ };
+
+ encoder_rpc: encoder-rpc@0x92200000 {
+ reg = <0 0x92200000 0 0x200000>;
+ no-map;
+ };
+
+ encoder_reserved: encoder_reserved@94400000 {
+ no-map;
+ reg = <0 0x94400000 0 0x800000>;
+ };
+
+ vdev0vring0: vdev0vring0@90000000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x90000000 0 0x8000>;
+ no-map;
+ };
+
+ vdev0vring1: vdev0vring1@90008000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x90008000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring0: vdev1vring0@90010000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x90010000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring1: vdev1vring1@90018000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x90018000 0 0x8000>;
+ no-map;
+ };
+
+ vdevbuffer: vdevbuffer {
+ compatible = "shared-dma-pool";
+ reg = <0 0x90400000 0 0x100000>;
+ no-map;
+ };
+ };
+
+ sound_card: sound-card {
+ compatible = "simple-audio-card";
+ simple-audio-card,bitclock-master = <&dailink_master>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&dailink_master>;
+ simple-audio-card,name = "imx8qxp-sgtl5000";
+
+ dailink_master: simple-audio-card,codec {
+ sound-dai = <&sgtl5000_a>;
+ clocks = <&mclkout0_lpcg 0>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai0>;
+ };
+ };
+
+ vdd_3v3_vga: regulator-vga-avcc {
+ compatible = "regulator-fixed";
+ regulator-name = "+3.3V_AVCC_VGA";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+};
+
+/* Colibri Analogue Inputs */
+&adc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_adc0>;
+ status = "okay";
+ vref-supply = <&reg_module_vref_1v8>;
+};
+
+/* Colibri PWM_A */
+&adma_pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm_a>;
+ #pwm-cells = <3>;
+};
+
+&adma_lcdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif>;
+ status = "disabled";
+};
+
+/* Display Prefetch Resolve, (Tiling) */
+&dc0_dpr1_channel1 {
+ status = "okay";
+};
+
+&dc0_dpr1_channel2 {
+ status = "okay";
+};
+
+&dc0_dpr1_channel3 {
+ status = "okay";
+};
+
+&dc0_dpr2_channel1 {
+ status = "okay";
+};
+
+&dc0_dpr2_channel2 {
+ status = "okay";
+};
+
+&dc0_dpr2_channel3 {
+ status = "okay";
+};
+
+&dc0_pc {
+ status = "okay";
+};
+
+&dc0_prg1 {
+ status = "okay";
+};
+
+&dc0_prg2 {
+ status = "okay";
+};
+
+&dc0_prg3 {
+ status = "okay";
+};
+
+&dc0_prg4 {
+ status = "okay";
+};
+
+&dc0_prg5 {
+ status = "okay";
+};
+
+&dc0_prg6 {
+ status = "okay";
+};
+
+&dc0_prg7 {
+ status = "okay";
+};
+
+&dc0_prg8 {
+ status = "okay";
+};
+
+&dc0_prg9 {
+ status = "okay";
+};
+
+&dpu1 {
+ status = "okay";
+};
+
+&dpu_disp1_lcdif {
+ remote-endpoint = <&lcd_display_in>;
+};
+
+&enet0_lpcg {
+ clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>,
+ <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>,
+ <&conn_axi_clk>,
+ <&clk IMX_SC_R_ENET_0 IMX_SC_C_DISABLE_50>,
+ <&conn_ipg_clk>,
+ <&conn_ipg_clk>;
+ clock-output-names = "enet0_lpcg_timer_clk",
+ "enet0_lpcg_txc_sampling_clk",
+ "enet0_lpcg_ahb_clk",
+ "enet0_lpcg_ref_50mhz_clk",
+ "enet0_lpcg_ipg_clk",
+ "enet0_lpcg_ipg_s_clk";
+};
+
+/* Colibri FastEthernet */
+&fec1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_fec1>;
+ pinctrl-1 = <&pinctrl_fec1_sleep>;
+ phy-mode = "rmii";
+ phy-handle = <&ethphy0>;
+ fsl,magic-packet;
+ fsl,wakeup_irq = <0>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@2 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ max-speed = <100>;
+ reg = <2>;
+ };
+ };
+};
+
+/* Colibri optional CAN on UART_B RTS/CTS */
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ xceiver-supply = <&reg_module_3v3>;
+};
+
+/* Colibri optional CAN on PS2 */
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ xceiver-supply = <&reg_module_3v3>;
+};
+
+/* Colibri optional CAN on UART_A TXD/RXD */
+&flexcan3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan3>;
+ xceiver-supply = <&reg_module_3v3>;
+};
+
+&gpu_3d0 {
+ status = "okay";
+};
+
+&hsio_refb_clk {
+ status = "disabled";
+};
+
+/* On-module I2C */
+&i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ /*
+ * There is a shared clock between SGTL5000 and on-module USB hub,
+ * so it is a good way to handle pinmuxing for this clock on a parent
+ * device i2c0
+ */
+ pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>;
+ status = "okay";
+
+ /* on-module Resistive Touch controller */
+ ad7879_ts: touchscreen@2c {
+ compatible = "adi,ad7879-1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ad7879_int>;
+ reg = <0x2c>;
+ interrupt-parent = <&lsio_gpio3>;
+ interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
+ touchscreen-max-pressure = <4096>;
+ adi,resistance-plate-x = <120>;
+ adi,first-conversion-delay = /bits/ 8 <3>;
+ adi,acquisition-time = /bits/ 8 <1>;
+ adi,median-filter-size = /bits/ 8 <2>;
+ adi,averaging = /bits/ 8 <1>;
+ adi,conversion-interval = /bits/ 8 <255>;
+ status = "disabled";
+ };
+
+ /* GPIO expander */
+ gpio_expander_43: gpio-expander@43 {
+ compatible = "fcs,fxl6408";
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x43>;
+ inital_io_dir = <0xff>;
+ inital_output = <0x05>;
+ gpio-line-names = "Wi-Fi_W_DISABLE", "Wi-Fi_WKUP_WLAN",
+ "PWR_EN_+V3.3_WiFi_N", "PCIe_REF_CLK_EN",
+ "USB_RESET_N", "USB_BYPASS_N", "Wi-Fi_PDn",
+ "Wi-Fi_WKUP_BT";
+ };
+
+ sgtl5000_a: codec@a {
+ compatible = "fsl,sgtl5000";
+ #sound-dai-cells = <0>;
+ assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
+ <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
+ <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
+ <&mclkout0_lpcg 0>;
+ assigned-clock-rates = <786432000>, <49152000>, <12000000>, <12000000>;
+ clocks = <&mclkout0_lpcg 0>;
+ clock-names = "mclk";
+ reg = <0xa>;
+ VDDA-supply = <&reg_module_3v3_avdd>;
+ VDDD-supply = <&reg_module_vref_1v8>;
+ VDDIO-supply = <&reg_module_3v3>;
+ };
+
+ /* USB3503A */
+ usb3803@8 {
+ compatible = "smsc,usb3803";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb3503a>;
+ assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
+ <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
+ <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
+ <&mclkout0_lpcg 0>;
+ assigned-clock-rates = <786432000>, <49152000>, <12000000>, <12000000>;
+ bypass-gpios = <&gpio_expander_43 5 GPIO_ACTIVE_LOW>;
+ clocks = <&mclkout0_lpcg 0>;
+ clock-names = "refclk";
+ disabled-ports = <2>;
+ initial-mode = <1>;
+ intn-gpios = <&lsio_gpio3 4 GPIO_ACTIVE_LOW>;
+ non-removable-devices = <1>;
+ reg = <0x8>;
+ reset-gpios = <&gpio_expander_43 4 GPIO_ACTIVE_LOW>;
+ };
+};
+
+/* MIPI DSI accessible on FFC (X2) */
+&i2c0_mipi_lvds0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>;
+ clock-frequency = <100000>;
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* DSI to HDMI Adapter V1.1A */
+ pca9540_switch: i2c-switch@70 {
+ compatible = "nxp,pca9540";
+ reg = <0x70>;
+ i2c-mux-idle-disconnect;
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* DDC/EDID */
+ i2c_sw0: i2c-sw@0 {
+ reg = <0>;
+ };
+
+ /* DSI-HDMI converter */
+ i2c-sw@1 {
+ reg = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ lt8912_hdmi: dsihdmi@48 {
+ compatible = "lontium,lt8912";
+ ddc-i2c-bus = <&i2c_sw0>;
+ hpd-gpios = <&lsio_gpio1 31 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_hpd>;
+ reg = <0x48>;
+
+ port {
+ lt8912_in: endpoint {
+ remote-endpoint = <&mipi0_dsi_host_out>;
+ };
+ };
+ };
+ };
+ };
+};
+
+/* On-module MIPI CSI I2C accessible on FFC (X3) */
+&i2c0_mipi_lvds1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0_mipi_lvds1>;
+};
+
+/* Colibri I2C */
+&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+
+ /* Atmel maxtouch controller */
+ atmel_mxt_ts: touchscreen@4a {
+ compatible = "atmel,maxtouch";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_atmel_conn>;
+ reg = <0x4a>;
+ interrupt-parent = <&lsio_gpio3>;
+ interrupts = <20 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */
+ reset-gpios = <&lsio_gpio3 24 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */
+ status = "disabled";
+ };
+};
+
+&imx8_gpu_ss {
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_hog2>,
+ <&pinctrl_ext_io0>, <&pinctrl_lpspi2_cs2>;
+
+ colibri-imx8qxp {
+ /* On-module touch pen-down interrupt */
+ pinctrl_ad7879_int: ad7879-int {
+ fsl,pins = <
+ IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 0x21
+ >;
+ };
+
+ /* Colibri Analogue Inputs */
+ pinctrl_adc0: adc0grp {
+ fsl,pins = <
+ IMX8QXP_ADC_IN0_ADMA_ADC_IN0 0x60 /* SODIMM 8 */
+ IMX8QXP_ADC_IN1_ADMA_ADC_IN1 0x60 /* SODIMM 6 */
+ IMX8QXP_ADC_IN4_ADMA_ADC_IN4 0x60 /* SODIMM 4 */
+ IMX8QXP_ADC_IN5_ADMA_ADC_IN5 0x60 /* SODIMM 2 */
+ >;
+ };
+
+ /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */
+ pinctrl_atmel_conn: mxt-ts-connector {
+ fsl,pins = <
+ IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x4000021 /* SODIMM 107 */
+ IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x21 /* SODIMM 106 */
+ >;
+ };
+
+ /* Atmel MXT touchsceen + Capacitive Touch Adapter */
+ /* NOTE: This pingroup conflicts with pingroups
+ * pinctrl_pwm_b/pinctrl_pwm_c. Don't enable them
+ * simultaneously.
+ */
+ pinctrl_atmel_adap: mxt-ts-adapter {
+ fsl,pins = <
+ IMX8QXP_UART1_TX_LSIO_GPIO0_IO21 0x4000021 /* SODIMM 28 */
+ IMX8QXP_UART1_RX_LSIO_GPIO0_IO22 0x21 /* SODIMM 30 */
+ >;
+ };
+
+ pinctrl_can_int: can-int-grp {
+ fsl,pins = <
+ IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40 /* SODIMM 73 */
+ >;
+ };
+
+ pinctrl_csi_ctl: csictlgrp {
+ fsl,pins = <
+ IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20 /* SODIMM 77 / X3-22 / CSI_CTL_GPIO2 */
+ IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20 /* SODIMM 89 / X3-11 / CSI_CTL_RESET# */
+ >;
+ };
+
+ pinctrl_csi_mclk: csimclkgrp {
+ fsl,pins = <
+ IMX8QXP_CSI_MCLK_CI_PI_MCLK 0xC0000041 /* SODIMM 75 / X3-12 */
+ >;
+ };
+
+ pinctrl_gpiokeys: gpiokeysgrp {
+ fsl,pins = <
+ IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041 /* SODIMM 45 */
+ >;
+ };
+
+ /* Colibri UART_B */
+ pinctrl_lpuart0: lpuart0grp {
+ fsl,pins = <
+ IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 /* SODIMM 36 */
+ IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 /* SODIMM 38 */
+ IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020 /* SODIMM 34 */
+ IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020 /* SODIMM 32 */
+ >;
+ };
+
+ /* Colibri UART_C */
+ pinctrl_lpuart2: lpuart2grp {
+ fsl,pins = <
+ IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020 /* SODIMM 19 */
+ IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020 /* SODIMM 21 */
+ >;
+ };
+
+ /* Colibri UART_A */
+ pinctrl_lpuart3: lpuart3grp {
+ fsl,pins = <
+ IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020 /* SODIMM 33 */
+ IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 /* SODIMM 35 */
+ >;
+ };
+
+ /* Colibri UART_A Control */
+ pinctrl_lpuart3_ctrl: lpuart3ctrlgrp {
+ fsl,pins = <
+ IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x20 /* SODIMM 23 */
+ IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 0x20 /* SODIMM 25 */
+ IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 0x20 /* SODIMM 27 */
+ IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0x20 /* SODIMM 29 */
+ IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x20 /* SODIMM 31 */
+ IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20 /* SODIMM 37 */
+ >;
+ };
+
+ /* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */
+ pinctrl_fec1: fec1grp {
+ fsl,pins = <
+ IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0 /* Use pads in 3.3V mode */
+ IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD 0x000014a0 /* Use pads in 3.3V mode */
+ IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020
+ IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020
+ IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61
+ IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT 0x06000061
+ IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61
+ IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61
+ IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61
+ IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61
+ IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61
+ IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER 0x61
+ >;
+ };
+
+ pinctrl_fec1_sleep: fec1-sleep-grp {
+ fsl,pins = <
+ IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11 0x06000041
+ IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10 0x06000041
+ IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x41
+ IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x41
+ IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 0x41
+ IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 0x41
+ IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04 0x41
+ IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05 0x41
+ IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06 0x41
+ IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07 0x41
+ >;
+ };
+
+ /* Colibri LCD Back-Light GPIO */
+ pinctrl_gpio_bl_on: gpio-bl-on {
+ fsl,pins = <
+ IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12 0x60 /* SODIMM 71 */
+ >;
+ };
+
+ /* HDMI Hot Plug Detect on FFC (X2) */
+ pinctrl_gpio_hpd: gpio-hpd {
+ fsl,pins = <
+ IMX8QXP_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO31 0x20 /* SODIMM 138 */
+ >;
+ };
+
+ pinctrl_hog0: hog0grp {
+ fsl,pins = <
+ IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0 /* Use pads in 3.3V mode */
+ >;
+ };
+
+ pinctrl_hog1: hog1grp {
+ fsl,pins = <
+ IMX8QXP_CSI_D07_CI_PI_D09 0x61 /* SODIMM 65 */
+ IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20 /* SODIMM 69 */
+ IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20 /* SODIMM 79 */
+ IMX8QXP_CSI_D02_CI_PI_D04 0x61 /* SODIMM 79 */
+ IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020 /* SODIMM 85 */
+ IMX8QXP_CSI_D06_CI_PI_D08 0x61 /* SODIMM 85 */
+ IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20 /* SODIMM 97 */
+ IMX8QXP_CSI_D03_CI_PI_D05 0x61 /* SODIMM 97 */
+ IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20 /* SODIMM 101 */
+ IMX8QXP_CSI_D00_CI_PI_D02 0x61 /* SODIMM 101 */
+ IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20 /* SODIMM 103 */
+ IMX8QXP_CSI_D01_CI_PI_D03 0x61 /* SODIMM 103 */
+ IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20 /* SODIMM 105 */
+ IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20 /* SODIMM 127 */
+ IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20 /* SODIMM 131 */
+ IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20 /* SODIMM 133 */
+ IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20 /* SODIMM 96 */
+ IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 0x20 /* SODIMM 98 */
+ IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20 /* SODIMM 100 */
+ IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22 0x20 /* SODIMM 102 */
+ IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23 0x20 /* SODIMM 104 */
+ >;
+ };
+
+ pinctrl_hog2: hog2grp {
+ fsl,pins = <
+ IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20 /* SODIMM 93 */
+ >;
+ };
+
+ pinctrl_hog3: hog3grp {
+ fsl,pins = <
+ IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20 /* SODIMM 75 */
+ >;
+ };
+
+ /*
+ * This pin is used in the SCFW as a UART. Using it from
+ * Linux would require rewritting the SCFW board file.
+ */
+ pinctrl_hog_scfw: hogscfwgrp {
+ fsl,pins = <
+ IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03 0x20 /* SODIMM 144 */
+ >;
+ };
+
+ /* On Module I2C */
+ pinctrl_i2c0: i2c0grp {
+ fsl,pins = <
+ IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 0x06000021
+ IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 0x06000021
+ >;
+ };
+
+ /* Colibri I2C */
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL 0x06000021 /* SODIMM 196 */
+ IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA 0x06000021 /* SODIMM 194 */
+ >;
+ };
+
+ /* Colibri optional CAN on UART_B RTS/CTS */
+ pinctrl_flexcan1: flexcan0grp {
+ fsl,pins = <
+ IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 /* SODIMM 32 */
+ IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 /* SODIMM 34 */
+ >;
+ };
+
+ /* Colibri optional CAN on PS2 */
+ pinctrl_flexcan2: flexcan1grp {
+ fsl,pins = <
+ IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 /* SODIMM 55 */
+ IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 /* SODIMM 63 */
+ >;
+ };
+
+ /* Colibri optional CAN on UART_A TXD/RXD */
+ pinctrl_flexcan3: flexcan2grp {
+ fsl,pins = <
+ IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21 /* SODIMM 35 */
+ IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x21 /* SODIMM 33 */
+ >;
+ };
+
+ /* On module wifi module */
+ pinctrl_pcieb: pciebgrp {
+ fsl,pins = <
+ IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000061 /* SODIMM 178 */
+ IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000061 /* SODIMM 94 */
+ IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x60 /* SODIMM 81 */
+ >;
+ };
+
+ /* Colibri PWM_A */
+ pinctrl_pwm_a: pwma {
+ /* both pins are connected together, reserve the unused CSI_D05 */
+ fsl,pins = <
+ IMX8QXP_CSI_D05_CI_PI_D07 0x61 /* SODIMM 59 */
+ IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT 0x60 /* SODIMM 59 */
+ >;
+ };
+
+ /* Colibri PWM_B */
+ pinctrl_pwm_b: pwmb {
+ fsl,pins = <
+ IMX8QXP_UART1_TX_LSIO_PWM0_OUT 0x60 /* SODIMM 28 */
+ >;
+ };
+
+ /* Colibri PWM_C */
+ pinctrl_pwm_c: pwmc {
+ fsl,pins = <
+ IMX8QXP_UART1_RX_LSIO_PWM1_OUT 0x60 /* SODIMM 30 */
+ >;
+ };
+
+ /* Colibri PWM_D */
+ pinctrl_pwm_d: pwmd {
+ /* both pins are connected together, reserve the unused CSI_D04 */
+ fsl,pins = <
+ IMX8QXP_CSI_D04_CI_PI_D06 0x61 /* SODIMM 67 */
+ IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT 0x60 /* SODIMM 67 */
+ >;
+ };
+
+ /* On-module I2S */
+ pinctrl_sai0: sai0grp {
+ fsl,pins = <
+ IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD 0x06000040
+ IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD 0x06000040
+ IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC 0x06000040
+ IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS 0x06000040
+ >;
+ };
+
+ /* Colibri Audio Analogue Microphone GND */
+ pinctrl_sgtl5000: sgtl5000 {
+ fsl,pins = <
+ /* MIC GND EN */
+ IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06 0x41
+ >;
+ };
+
+ /* On-module SGTL5000 clock */
+ pinctrl_sgtl5000_usb_clk: sgtl5000-usb-clk {
+ fsl,pins = <
+ IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0 0x21
+ >;
+ };
+
+ /* On-module USB interrupt */
+ pinctrl_usb3503a: usb3503a-grp {
+ fsl,pins = <
+ IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 0x61
+ >;
+ };
+
+ /* Colibri USB Client Cable Detect */
+ pinctrl_usbc_det: usbc-det {
+ fsl,pins = <
+ IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x06000040 /* SODIMM 137 */
+ >;
+ };
+
+ pinctrl_ext_io0: ext-io0 {
+ fsl,pins = <
+ IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08 0x06000040 /* SODIMM 135 */
+ >;
+ };
+
+ /* Colibri Parallel RGB LCD Interface */
+ pinctrl_lcdif: lcdif-pins {
+ fsl,pins = <
+ IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x40 /* SODIMM 44 */
+ IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN 0x40 /* SODIMM 44 */
+ IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK 0x60 /* SODIMM 56 */
+ IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC 0x60 /* SODIMM 68 */
+ IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC 0x60 /* SODIMM 82 */
+ IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00 0x60 /* SODIMM 76 */
+ IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x60 /* SODIMM 76 */
+ IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01 0x60 /* SODIMM 70 */
+ IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02 0x60 /* SODIMM 60 */
+ IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03 0x60 /* SODIMM 58 */
+ IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04 0x60 /* SODIMM 78 */
+ IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05 0x60 /* SODIMM 72 */
+ IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06 0x60 /* SODIMM 80 */
+ IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07 0x60 /* SODIMM 46 */
+ IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08 0x60 /* SODIMM 62 */
+ IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09 0x60 /* SODIMM 48 */
+ IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10 0x60 /* SODIMM 74 */
+ IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11 0x60 /* SODIMM 50 */
+ IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 0x60 /* SODIMM 52 */
+ IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13 0x60 /* SODIMM 54 */
+ IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 0x60 /* SODIMM 66 */
+ IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15 0x60 /* SODIMM 64 */
+ IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 0x60 /* SODIMM 57 */
+ IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x60 /* SODIMM 57 */
+ IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 0x60 /* SODIMM 61 */
+ >;
+ };
+
+ /* LVDS converter on Iris v2.0 */
+ pinctrl_lvds_converter: lcd-lvds {
+ fsl,pins = <
+ IMX8QXP_FLEXCAN1_TX_LSIO_GPIO1_IO18 0x20 /* SODIMM 55 */
+ /* 6B/8B mode. Select LOW - 8B mode (24bit) */
+ IMX8QXP_FLEXCAN1_RX_LSIO_GPIO1_IO17 0x20 /* SODIMM 63 */
+ IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 0x20 /* SODIMM 95 */
+ IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x20 /* SODIMM 99 */
+ >;
+ };
+
+ /* USB Host Power Enable */
+ pinctrl_usbh1_reg: usbh1-reg {
+ fsl,pins = <
+ IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 0x06000040 /* SODIMM 129 */
+ >;
+ };
+
+ /* On-module eMMC */
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
+ IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21
+ IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21
+ IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21
+ IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21
+ IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21
+ IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21
+ IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21
+ IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21
+ IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21
+ IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41
+ IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
+ IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21
+ IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21
+ IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21
+ IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21
+ IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21
+ IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21
+ IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21
+ IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21
+ IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21
+ IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41
+ IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
+ IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21
+ IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21
+ IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21
+ IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21
+ IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21
+ IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21
+ IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21
+ IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21
+ IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21
+ IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41
+ IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21
+ >;
+ };
+
+ /* Colibri SDCard CardDetect */
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+ fsl,pins = <
+ IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x06000021 /* SODIMM 43 */
+ >;
+ };
+
+ pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp {
+ fsl,pins = <
+ IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x60 /* SODIMM 43 */
+ >;
+ };
+
+ /* Colibri SDCard */
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */
+ IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */
+ IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */
+ IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */
+ IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */
+ IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */
+ IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21
+ >;
+ };
+
+ pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+ fsl,pins = <
+ IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */
+ IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */
+ IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */
+ IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */
+ IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */
+ IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */
+ IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21
+ >;
+ };
+
+ pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+ fsl,pins = <
+ IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */
+ IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */
+ IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */
+ IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */
+ IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */
+ IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */
+ IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21
+ >;
+ };
+
+ pinctrl_usdhc2_sleep: usdhc2slpgrp {
+ fsl,pins = <
+ IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23 0x60 /* SODIMM 47 */
+ IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24 0x60 /* SODIMM 190 */
+ IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60 /* SODIMM 192 */
+ IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60 /* SODIMM 49 */
+ IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60 /* SODIMM 51 */
+ IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60 /* SODIMM 53 */
+ IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21
+ >;
+ };
+
+ /* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */
+ pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp {
+ fsl,pins = <
+ IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 /* SODIMM 140 */
+ IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 /* SODIMM 142 */
+ >;
+ };
+
+ /* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */
+ pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp {
+ fsl,pins = <
+ IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 /* SODIMM 186 */
+ IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 /* SODIMM 188 */
+ >;
+ };
+
+ /* Colibri SPI */
+ pinctrl_lpspi2: lpspi2 {
+ fsl,pins = <
+ IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x21 /* SODIMM 86 */
+ IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040 /* SODIMM 92 */
+ IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x06000040 /* SODIMM 90 */
+ IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x06000040 /* SODIMM 88 */
+ >;
+ };
+
+ pinctrl_lpspi2_cs2: lpspi2-cs2 {
+ fsl,pins = <
+ IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x21 /* SODIMM 65 */
+ >;
+ };
+
+ pinctrl_wifi: wifigrp {
+ fsl,pins = <
+ IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20
+ >;
+ };
+ };
+};
+
+&irqsteer_csi0 {
+ status = "okay";
+};
+
+&isi_0 {
+ /**
+ * interface = <Input MIPI_VCx Output>
+ * Input: 0-DC0, 1-DC1, 2-MIPI CSI0, 3-MIPI CSI1, 4-HDMI, 5-MEM, INPUT: 6-PARALLEL CSI
+ * MIPI_VCx: 0-VC0, 1-VC1, 2-VC2, 3-VC3, MIPI CSI only
+ * Output: 0-DC0, 1-DC1, 2-MEM
+ */
+ interface = <2 0 2>;
+
+ cap_device {
+ status = "okay";
+ };
+
+ m2m_device {
+ status = "okay";
+ };
+};
+
+&isi_1 {
+ interface = <6 0 2>;
+ parallel_csi;
+};
+
+/* Colibri SPI */
+&lpspi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpspi2>;
+ cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ spidev0: spidev@0 {
+ compatible = "toradex,evalspi";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ };
+};
+
+/* Colibri UART_B */
+&lpuart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpuart0>;
+};
+
+/* Colibri UART_C */
+&lpuart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpuart2>;
+};
+
+/* Colibri UART_A */
+&lpuart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>;
+};
+
+&lsio_gpio0 {
+ gpio-line-names = "",
+ "SODIMM_70",
+ "SODIMM_60",
+ "SODIMM_58",
+ "SODIMM_78",
+ "SODIMM_72",
+ "SODIMM_80",
+ "SODIMM_46",
+ "SODIMM_62",
+ "SODIMM_48",
+ "SODIMM_74",
+ "SODIMM_50",
+ "SODIMM_52",
+ "SODIMM_54",
+ "SODIMM_66",
+ "SODIMM_64",
+ "SODIMM_68",
+ "",
+ "",
+ "SODIMM_82",
+ "SODIMM_56",
+ "SODIMM_28",
+ "SODIMM_30",
+ "",
+ "SODIMM_61",
+ "SODIMM_103",
+ "",
+ "",
+ "",
+ "SODIMM_25",
+ "SODIMM_27",
+ "SODIMM_100";
+ status = "okay";
+};
+
+&lsio_gpio1 {
+ gpio-line-names = "SODIMM_86",
+ "SODIMM_92",
+ "SODIMM_90",
+ "SODIMM_88",
+ "",
+ "",
+ "",
+ "SODIMM_59",
+ "",
+ "SODIMM_6",
+ "SODIMM_8",
+ "",
+ "",
+ "SODIMM_2",
+ "SODIMM_4",
+ "SODIMM_34",
+ "SODIMM_32",
+ "SODIMM_63",
+ "SODIMM_55",
+ "SODIMM_33",
+ "SODIMM_35",
+ "SODIMM_36",
+ "SODIMM_38",
+ "SODIMM_21",
+ "SODIMM_19",
+ "SODIMM_140",
+ "SODIMM_142",
+ "SODIMM_196",
+ "SODIMM_194",
+ "SODIMM_186",
+ "SODIMM_188",
+ "SODIMM_138";
+ status = "okay";
+};
+
+&lsio_gpio2 {
+ gpio-line-names = "SODIMM_23",
+ "",
+ "",
+ "SODIMM_144";
+ status = "okay";
+};
+
+&lsio_gpio3 {
+ gpio-line-names = "SODIMM_96",
+ "SODIMM_75",
+ "SODIMM_37",
+ "SODIMM_29",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_43",
+ "SODIMM_45",
+ "SODIMM_69",
+ "SODIMM_71",
+ "SODIMM_73",
+ "SODIMM_77",
+ "SODIMM_89",
+ "SODIMM_93",
+ "SODIMM_95",
+ "SODIMM_99",
+ "SODIMM_105",
+ "SODIMM_107",
+ "SODIMM_98",
+ "SODIMM_102",
+ "SODIMM_104",
+ "SODIMM_106";
+ status = "okay";
+};
+
+&lsio_gpio4 {
+ gpio-line-names = "",
+ "",
+ "",
+ "SODIMM_129",
+ "SODIMM_133",
+ "SODIMM_127",
+ "SODIMM_131",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_44",
+ "",
+ "SODIMM_76",
+ "SODIMM_31",
+ "SODIMM_47",
+ "SODIMM_190",
+ "SODIMM_192",
+ "SODIMM_49",
+ "SODIMM_51",
+ "SODIMM_53";
+ status = "okay";
+};
+
+&lsio_gpio5 {
+ gpio-line-names = "",
+ "SODIMM_57",
+ "SODIMM_65",
+ "SODIMM_85",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_135",
+ "SODIMM_137",
+ "UNUSABLE_SODIMM_180",
+ "UNUSABLE_SODIMM_184";
+ status = "okay";
+};
+
+/* MIPI CSI accessible via FFC (X3) */
+&mipi_csi_0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ /delete-property/virtual-channel;
+};
+
+&mipi0_dsi_host {
+ pwr-delay = <10>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@1 {
+ reg = <1>;
+ mipi0_dsi_host_out: endpoint {
+ remote-endpoint = <&lt8912_in>;
+ };
+ };
+ };
+};
+
+&mipi1_dsi_host {
+ pwr-delay = <10>;
+};
+
+/* On-module PCIe for Wi-Fi */
+&pcieb{
+ compatible = "fsl,imx8qxp-pcie","snps,dw-pcie";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcieb &pinctrl_wifi>;
+ clocks = <&pcieb_lpcg 0>,
+ <&pcieb_lpcg 1>,
+ <&pcieb_lpcg 2>,
+ <&phyx1_lpcg 0>,
+ <&phyx1_crr1_lpcg 0>,
+ <&pcieb_crr3_lpcg 0>,
+ <&misc_crr5_lpcg 0>,
+ <&pcie_refclk_gate>;
+ clock-names = "pcie", "pcie_bus", "pcie_inbound_axi",
+ "pcie_phy", "phy_per", "pcie_per", "misc_per",
+ "pcie_ext";
+
+ clkreq-gpio = <&lsio_gpio4 1 GPIO_ACTIVE_LOW>;
+ ext_osc = <1>;
+ fsl,max-link-speed = <1>;
+ hard-wired = <1>;
+ disable-gpio = <&gpio_expander_43 6 GPIO_ACTIVE_LOW>;
+ power-on-gpio = <&gpio_expander_43 2 GPIO_ACTIVE_LOW>;
+ reserved-region = <&rpmsg_reserved>;
+ reset-gpio = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+/* Colibri PWM_B */
+&pwm0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm_b>;
+ #pwm-cells = <3>;
+};
+
+/* Colibri PWM_C */
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm_c>;
+ #pwm-cells = <3>;
+};
+
+/* Colibri PWM_D */
+&pwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm_d>;
+ #pwm-cells = <3>;
+};
+
+&rpmsg{
+ /*
+ * 64K for one rpmsg instance:
+ */
+ vdev-nums = <2>;
+ reg = <0x0 0x90000000 0x0 0x20000>;
+ memory-region = <&vdevbuffer>;
+ status = "okay";
+};
+
+/* On-module I2S */
+&sai0 {
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai0>;
+ status = "okay";
+};
+
+/* On-module eMMC */
+&usdhc1 {
+ bus-width = <8>;
+ no-sd;
+ no-sdio;
+ non-removable;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ status = "okay";
+};
+
+/* Colibri SDCard */
+&usdhc2 {
+ bus-width = <4>;
+ cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
+ disable-wp;
+ vmmc-supply = <&reg_module_3v3>;
+};
+
+&vpu_decoder {
+ boot-region = <&decoder_boot>;
+ rpc-region = <&decoder_rpc>;
+ reg-csr = <0x2d040000>;
+ core_type = <1>;
+ status = "okay";
+};
+
+&vpu_encoder {
+ boot-region = <&encoder_boot>;
+ rpc-region = <&encoder_rpc>;
+ reserved-region = <&encoder_reserved>;
+ reg-rpc-system = <0x40000000>;
+ resolution-max = <1920 1920>;
+ mbox-names = "enc1_tx0", "enc1_tx1", "enc1_rx";
+ mboxes = <&mu1_m0 0 0
+ &mu1_m0 0 1
+ &mu1_m0 1 0>;
+ status = "okay";
+
+ core0@1020000 {
+ compatible = "fsl,imx8-mu1-vpu-m0";
+ reg = <0x1020000 0x20000>;
+ reg-csr = <0x1050000 0x10000>;
+ interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,vpu_ap_mu_id = <17>;
+ fw-buf-size = <0x200000>;
+ rpc-buf-size = <0x80000>;
+ print-buf-size = <0x80000>;
+ };
+};
diff --git a/arch/arm64/configs/toradex_defconfig b/arch/arm64/configs/toradex_defconfig
index d6b149862c2e..ab008cc304b2 100644
--- a/arch/arm64/configs/toradex_defconfig
+++ b/arch/arm64/configs/toradex_defconfig
@@ -233,9 +233,9 @@ CONFIG_SCSI_MPT3SAS=m
CONFIG_SCSI_UFSHCD=y
CONFIG_SCSI_UFSHCD_PLATFORM=y
CONFIG_ATA=y
-CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI=m
CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_AHCI_IMX=y
+CONFIG_AHCI_IMX=m
CONFIG_AHCI_CEVA=y
CONFIG_SATA_SIL24=y
CONFIG_PATA_PLATFORM=y
@@ -415,8 +415,8 @@ CONFIG_SPI_SLAVE=y
CONFIG_SPI_SLAVE_TIME=y
CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y
CONFIG_SPMI=y
-CONFIG_PPS_CLIENT_LDISC=y
-CONFIG_PPS_CLIENT_GPIO=y
+CONFIG_PPS_CLIENT_LDISC=m
+CONFIG_PPS_CLIENT_GPIO=m
CONFIG_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_PINCTRL_MAX77620=y