diff options
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi | 26 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi | 131 |
2 files changed, 80 insertions, 77 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi index 53f56dc8f536..2af7b816edb8 100644 --- a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi @@ -255,19 +255,21 @@ <&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>, <&pinctrl_uart24_forceoff>; - pinctrl_leds_ixora: ledsixoragrp { - fsl,pins = < - IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 0x41 /* LED_4_GREEN */ - IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 0x41 /* LED_4_RED */ - IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 0x41 /* LED_5_GREEN */ - IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 0x41 /* LED_5_RED */ - >; - }; + apalis-imx8qm { + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = < + IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 0x41 /* LED_4_GREEN */ + IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 0x41 /* LED_4_RED */ + IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 0x41 /* LED_5_GREEN */ + IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 0x41 /* LED_5_RED */ + >; + }; - pinctrl_uart24_forceoff: uart24forceoffgrp { - fsl,pins = < - IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 0x21 - >; + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = < + IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 0x21 + >; + }; }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi index ba1f4c846820..dbd1ec092572 100644 --- a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi @@ -292,79 +292,80 @@ <&pinctrl_qspi1a_gpios>, <&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>, <&pinctrl_uart24_forceoff>; - pinctrl_leds_ixora: ledsixoragrp { - fsl,pins = < - IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 0x41 /* LED_4_GREEN */ - IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 0x41 /* LED_4_RED */ - IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 0x41 /* LED_5_GREEN */ - IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 0x41 /* LED_5_RED */ - >; - }; + apalis-imx8qm { + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = < + IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 0x41 /* LED_4_GREEN */ + IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 0x41 /* LED_4_RED */ + IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 0x41 /* LED_5_GREEN */ + IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 0x41 /* LED_5_RED */ + >; + }; - pinctrl_uart24_forceoff: uart24forceoffgrp { - fsl,pins = < - IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 0x21 - >; - }; + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = < + IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 0x21 + >; + }; - /* Apalis MMC1_CD# */ - pinctrl_mmc1_cd_4bit: mmc1cdgrp_4bit { - fsl,pins = < - IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021 - >; - }; + /* Apalis MMC1_CD# */ + pinctrl_mmc1_cd_4bit: mmc1cdgrp_4bit { + fsl,pins = < + IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021 + >; + }; - /* Apalis MMC1 */ - pinctrl_usdhc2_4bit: usdhc2grp_4bit { - fsl,pins = < - IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 - IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 - IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 - IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 - IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 - IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 - - /* On-module PMIC use */ - IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 - >; - }; + /* Apalis MMC1 */ + pinctrl_usdhc2_4bit: usdhc2grp_4bit { + fsl,pins = < + IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 + IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 + IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 + IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 + IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 + IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 + + /* On-module PMIC use */ + IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 + >; + }; - /* Apalis MMC1_CD# */ - pinctrl_mmc1_cd_4bit_sleep: mmc1cdgrp_4bit { - fsl,pins = < - IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x04000041 - >; - }; + /* Apalis MMC1_CD# */ + pinctrl_mmc1_cd_4bit_sleep: mmc1cdgrp_4bit { + fsl,pins = < + IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x04000041 + >; + }; - /* Apalis MMC1 */ - pinctrl_usdhc2_4bit_sleep: usdhc2grp_4bit { - fsl,pins = < - IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x04000041 - IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x04000041 - IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x04000041 - IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x04000041 - IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x04000041 - IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x04000041 - - /* On-module PMIC use */ - IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x04000041 - >; - }; + /* Apalis MMC1 */ + pinctrl_usdhc2_4bit_sleep: usdhc2grp_4bit { + fsl,pins = < + IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x04000041 + IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x04000041 + IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x04000041 + IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x04000041 + IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x04000041 + IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x04000041 + + /* On-module PMIC use */ + IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x04000041 + >; + }; - /* PMIC MMC1 power-switch */ - pinctrl_enable_3v3_vmmc: enable_3v3_vmmc { - fsl,pins = < - IMX8QM_USDHC1_DATA4_LSIO_GPIO5_IO19 0x00000021 /* MXM3_148, PMIC */ - >; - }; + /* PMIC MMC1 power-switch */ + pinctrl_enable_3v3_vmmc: enable_3v3_vmmc { + fsl,pins = < + IMX8QM_USDHC1_DATA4_LSIO_GPIO5_IO19 0x00000021 /* MXM3_148, PMIC */ + >; + }; - /* FlexCAN PMIC */ - pinctrl_enable_can1_power: enable_can1_power { - fsl,pins = < - IMX8QM_USDHC1_DATA7_LSIO_GPIO5_IO22 0x00000021 /* MXM3_158, PMIC */ - >; + /* FlexCAN PMIC */ + pinctrl_enable_can1_power: enable_can1_power { + fsl,pins = < + IMX8QM_USDHC1_DATA7_LSIO_GPIO5_IO22 0x00000021 /* MXM3_158, PMIC */ + >; + }; }; - }; &irqsteer_csi0 { |